
time-syn-verification:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400f40 <_init>:
  400f40:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400f44:	910003fd 	mov	x29, sp
  400f48:	940000d0 	bl	401288 <call_weak_fn>
  400f4c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400f50:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400f60 <.plt>:
  400f60:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400f64:	f0000090 	adrp	x16, 413000 <__FRAME_END__+0xfc60>
  400f68:	f947fe11 	ldr	x17, [x16, #4088]
  400f6c:	913fe210 	add	x16, x16, #0xff8
  400f70:	d61f0220 	br	x17
  400f74:	d503201f 	nop
  400f78:	d503201f 	nop
  400f7c:	d503201f 	nop

0000000000400f80 <tcflush@plt>:
  400f80:	900000b0 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  400f84:	f9400211 	ldr	x17, [x16]
  400f88:	91000210 	add	x16, x16, #0x0
  400f8c:	d61f0220 	br	x17

0000000000400f90 <strtok@plt>:
  400f90:	900000b0 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  400f94:	f9400611 	ldr	x17, [x16, #8]
  400f98:	91002210 	add	x16, x16, #0x8
  400f9c:	d61f0220 	br	x17

0000000000400fa0 <strlen@plt>:
  400fa0:	900000b0 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  400fa4:	f9400a11 	ldr	x17, [x16, #16]
  400fa8:	91004210 	add	x16, x16, #0x10
  400fac:	d61f0220 	br	x17

0000000000400fb0 <exit@plt>:
  400fb0:	900000b0 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  400fb4:	f9400e11 	ldr	x17, [x16, #24]
  400fb8:	91006210 	add	x16, x16, #0x18
  400fbc:	d61f0220 	br	x17

0000000000400fc0 <pthread_attr_init@plt>:
  400fc0:	900000b0 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  400fc4:	f9401211 	ldr	x17, [x16, #32]
  400fc8:	91008210 	add	x16, x16, #0x20
  400fcc:	d61f0220 	br	x17

0000000000400fd0 <clock_gettime@plt>:
  400fd0:	900000b0 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  400fd4:	f9401611 	ldr	x17, [x16, #40]
  400fd8:	9100a210 	add	x16, x16, #0x28
  400fdc:	d61f0220 	br	x17

0000000000400fe0 <cfsetospeed@plt>:
  400fe0:	900000b0 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  400fe4:	f9401a11 	ldr	x17, [x16, #48]
  400fe8:	9100c210 	add	x16, x16, #0x30
  400fec:	d61f0220 	br	x17

0000000000400ff0 <tcgetattr@plt>:
  400ff0:	900000b0 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  400ff4:	f9401e11 	ldr	x17, [x16, #56]
  400ff8:	9100e210 	add	x16, x16, #0x38
  400ffc:	d61f0220 	br	x17

0000000000401000 <localtime@plt>:
  401000:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401004:	f9402211 	ldr	x17, [x16, #64]
  401008:	91010210 	add	x16, x16, #0x40
  40100c:	d61f0220 	br	x17

0000000000401010 <atoi@plt>:
  401010:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401014:	f9402611 	ldr	x17, [x16, #72]
  401018:	91012210 	add	x16, x16, #0x48
  40101c:	d61f0220 	br	x17

0000000000401020 <getpid@plt>:
  401020:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401024:	f9402a11 	ldr	x17, [x16, #80]
  401028:	91014210 	add	x16, x16, #0x50
  40102c:	d61f0220 	br	x17

0000000000401030 <time@plt>:
  401030:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401034:	f9402e11 	ldr	x17, [x16, #88]
  401038:	91016210 	add	x16, x16, #0x58
  40103c:	d61f0220 	br	x17

0000000000401040 <open@plt>:
  401040:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401044:	f9403211 	ldr	x17, [x16, #96]
  401048:	91018210 	add	x16, x16, #0x60
  40104c:	d61f0220 	br	x17

0000000000401050 <tzset@plt>:
  401050:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401054:	f9403611 	ldr	x17, [x16, #104]
  401058:	9101a210 	add	x16, x16, #0x68
  40105c:	d61f0220 	br	x17

0000000000401060 <strncmp@plt>:
  401060:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401064:	f9403a11 	ldr	x17, [x16, #112]
  401068:	9101c210 	add	x16, x16, #0x70
  40106c:	d61f0220 	br	x17

0000000000401070 <__libc_start_main@plt>:
  401070:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401074:	f9403e11 	ldr	x17, [x16, #120]
  401078:	9101e210 	add	x16, x16, #0x78
  40107c:	d61f0220 	br	x17

0000000000401080 <memset@plt>:
  401080:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401084:	f9404211 	ldr	x17, [x16, #128]
  401088:	91020210 	add	x16, x16, #0x80
  40108c:	d61f0220 	br	x17

0000000000401090 <gmtime@plt>:
  401090:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401094:	f9404611 	ldr	x17, [x16, #136]
  401098:	91022210 	add	x16, x16, #0x88
  40109c:	d61f0220 	br	x17

00000000004010a0 <putenv@plt>:
  4010a0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4010a4:	f9404a11 	ldr	x17, [x16, #144]
  4010a8:	91024210 	add	x16, x16, #0x90
  4010ac:	d61f0220 	br	x17

00000000004010b0 <system@plt>:
  4010b0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4010b4:	f9404e11 	ldr	x17, [x16, #152]
  4010b8:	91026210 	add	x16, x16, #0x98
  4010bc:	d61f0220 	br	x17

00000000004010c0 <close@plt>:
  4010c0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4010c4:	f9405211 	ldr	x17, [x16, #160]
  4010c8:	91028210 	add	x16, x16, #0xa0
  4010cc:	d61f0220 	br	x17

00000000004010d0 <pthread_create@plt>:
  4010d0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4010d4:	f9405611 	ldr	x17, [x16, #168]
  4010d8:	9102a210 	add	x16, x16, #0xa8
  4010dc:	d61f0220 	br	x17

00000000004010e0 <__gmon_start__@plt>:
  4010e0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4010e4:	f9405a11 	ldr	x17, [x16, #176]
  4010e8:	9102c210 	add	x16, x16, #0xb0
  4010ec:	d61f0220 	br	x17

00000000004010f0 <write@plt>:
  4010f0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4010f4:	f9405e11 	ldr	x17, [x16, #184]
  4010f8:	9102e210 	add	x16, x16, #0xb8
  4010fc:	d61f0220 	br	x17

0000000000401100 <pthread_join@plt>:
  401100:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401104:	f9406211 	ldr	x17, [x16, #192]
  401108:	91030210 	add	x16, x16, #0xc0
  40110c:	d61f0220 	br	x17

0000000000401110 <abort@plt>:
  401110:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401114:	f9406611 	ldr	x17, [x16, #200]
  401118:	91032210 	add	x16, x16, #0xc8
  40111c:	d61f0220 	br	x17

0000000000401120 <pthread_exit@plt>:
  401120:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401124:	f9406a11 	ldr	x17, [x16, #208]
  401128:	91034210 	add	x16, x16, #0xd0
  40112c:	d61f0220 	br	x17

0000000000401130 <puts@plt>:
  401130:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401134:	f9406e11 	ldr	x17, [x16, #216]
  401138:	91036210 	add	x16, x16, #0xd8
  40113c:	d61f0220 	br	x17

0000000000401140 <strcmp@plt>:
  401140:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401144:	f9407211 	ldr	x17, [x16, #224]
  401148:	91038210 	add	x16, x16, #0xe0
  40114c:	d61f0220 	br	x17

0000000000401150 <modf@plt>:
  401150:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401154:	f9407611 	ldr	x17, [x16, #232]
  401158:	9103a210 	add	x16, x16, #0xe8
  40115c:	d61f0220 	br	x17

0000000000401160 <fcntl@plt>:
  401160:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401164:	f9407a11 	ldr	x17, [x16, #240]
  401168:	9103c210 	add	x16, x16, #0xf0
  40116c:	d61f0220 	br	x17

0000000000401170 <fflush@plt>:
  401170:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401174:	f9407e11 	ldr	x17, [x16, #248]
  401178:	9103e210 	add	x16, x16, #0xf8
  40117c:	d61f0220 	br	x17

0000000000401180 <strcpy@plt>:
  401180:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401184:	f9408211 	ldr	x17, [x16, #256]
  401188:	91040210 	add	x16, x16, #0x100
  40118c:	d61f0220 	br	x17

0000000000401190 <read@plt>:
  401190:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401194:	f9408611 	ldr	x17, [x16, #264]
  401198:	91042210 	add	x16, x16, #0x108
  40119c:	d61f0220 	br	x17

00000000004011a0 <tcsetattr@plt>:
  4011a0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4011a4:	f9408a11 	ldr	x17, [x16, #272]
  4011a8:	91044210 	add	x16, x16, #0x110
  4011ac:	d61f0220 	br	x17

00000000004011b0 <select@plt>:
  4011b0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4011b4:	f9408e11 	ldr	x17, [x16, #280]
  4011b8:	91046210 	add	x16, x16, #0x118
  4011bc:	d61f0220 	br	x17

00000000004011c0 <usleep@plt>:
  4011c0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4011c4:	f9409211 	ldr	x17, [x16, #288]
  4011c8:	91048210 	add	x16, x16, #0x120
  4011cc:	d61f0220 	br	x17

00000000004011d0 <settimeofday@plt>:
  4011d0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4011d4:	f9409611 	ldr	x17, [x16, #296]
  4011d8:	9104a210 	add	x16, x16, #0x128
  4011dc:	d61f0220 	br	x17

00000000004011e0 <__isoc99_sscanf@plt>:
  4011e0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4011e4:	f9409a11 	ldr	x17, [x16, #304]
  4011e8:	9104c210 	add	x16, x16, #0x130
  4011ec:	d61f0220 	br	x17

00000000004011f0 <cfsetispeed@plt>:
  4011f0:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  4011f4:	f9409e11 	ldr	x17, [x16, #312]
  4011f8:	9104e210 	add	x16, x16, #0x138
  4011fc:	d61f0220 	br	x17

0000000000401200 <strncpy@plt>:
  401200:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401204:	f940a211 	ldr	x17, [x16, #320]
  401208:	91050210 	add	x16, x16, #0x140
  40120c:	d61f0220 	br	x17

0000000000401210 <printf@plt>:
  401210:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401214:	f940a611 	ldr	x17, [x16, #328]
  401218:	91052210 	add	x16, x16, #0x148
  40121c:	d61f0220 	br	x17

0000000000401220 <putchar@plt>:
  401220:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401224:	f940aa11 	ldr	x17, [x16, #336]
  401228:	91054210 	add	x16, x16, #0x150
  40122c:	d61f0220 	br	x17

0000000000401230 <ioctl@plt>:
  401230:	f0000090 	adrp	x16, 414000 <tcflush@GLIBC_2.17>
  401234:	f940ae11 	ldr	x17, [x16, #344]
  401238:	91056210 	add	x16, x16, #0x158
  40123c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000401240 <_start>:
  401240:	d280001d 	mov	x29, #0x0                   	// #0
  401244:	d280001e 	mov	x30, #0x0                   	// #0
  401248:	aa0003e5 	mov	x5, x0
  40124c:	f94003e1 	ldr	x1, [sp]
  401250:	910023e2 	add	x2, sp, #0x8
  401254:	910003e6 	mov	x6, sp
  401258:	580000c0 	ldr	x0, 401270 <_start+0x30>
  40125c:	580000e3 	ldr	x3, 401278 <_start+0x38>
  401260:	58000104 	ldr	x4, 401280 <_start+0x40>
  401264:	97ffff83 	bl	401070 <__libc_start_main@plt>
  401268:	97ffffaa 	bl	401110 <abort@plt>
  40126c:	00000000 	.inst	0x00000000 ; undefined
  401270:	0040133c 	.word	0x0040133c
  401274:	00000000 	.word	0x00000000
  401278:	00402ab8 	.word	0x00402ab8
  40127c:	00000000 	.word	0x00000000
  401280:	00402b38 	.word	0x00402b38
  401284:	00000000 	.word	0x00000000

0000000000401288 <call_weak_fn>:
  401288:	d0000080 	adrp	x0, 413000 <__FRAME_END__+0xfc60>
  40128c:	f947f000 	ldr	x0, [x0, #4064]
  401290:	b4000040 	cbz	x0, 401298 <call_weak_fn+0x10>
  401294:	17ffff93 	b	4010e0 <__gmon_start__@plt>
  401298:	d65f03c0 	ret
  40129c:	00000000 	.inst	0x00000000 ; undefined

00000000004012a0 <deregister_tm_clones>:
  4012a0:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  4012a4:	9105e000 	add	x0, x0, #0x178
  4012a8:	f0000081 	adrp	x1, 414000 <tcflush@GLIBC_2.17>
  4012ac:	9105e021 	add	x1, x1, #0x178
  4012b0:	eb00003f 	cmp	x1, x0
  4012b4:	540000a0 	b.eq	4012c8 <deregister_tm_clones+0x28>  // b.none
  4012b8:	b0000001 	adrp	x1, 402000 <uart_receive+0xd4>
  4012bc:	f945ac21 	ldr	x1, [x1, #2904]
  4012c0:	b4000041 	cbz	x1, 4012c8 <deregister_tm_clones+0x28>
  4012c4:	d61f0020 	br	x1
  4012c8:	d65f03c0 	ret
  4012cc:	d503201f 	nop

00000000004012d0 <register_tm_clones>:
  4012d0:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  4012d4:	9105e000 	add	x0, x0, #0x178
  4012d8:	f0000081 	adrp	x1, 414000 <tcflush@GLIBC_2.17>
  4012dc:	9105e021 	add	x1, x1, #0x178
  4012e0:	cb000021 	sub	x1, x1, x0
  4012e4:	9343fc21 	asr	x1, x1, #3
  4012e8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4012ec:	9341fc21 	asr	x1, x1, #1
  4012f0:	b40000a1 	cbz	x1, 401304 <register_tm_clones+0x34>
  4012f4:	b0000002 	adrp	x2, 402000 <uart_receive+0xd4>
  4012f8:	f945b042 	ldr	x2, [x2, #2912]
  4012fc:	b4000042 	cbz	x2, 401304 <register_tm_clones+0x34>
  401300:	d61f0040 	br	x2
  401304:	d65f03c0 	ret

0000000000401308 <__do_global_dtors_aux>:
  401308:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40130c:	910003fd 	mov	x29, sp
  401310:	f9000bf3 	str	x19, [sp, #16]
  401314:	f0000093 	adrp	x19, 414000 <tcflush@GLIBC_2.17>
  401318:	39460260 	ldrb	w0, [x19, #384]
  40131c:	35000080 	cbnz	w0, 40132c <__do_global_dtors_aux+0x24>
  401320:	97ffffe0 	bl	4012a0 <deregister_tm_clones>
  401324:	52800020 	mov	w0, #0x1                   	// #1
  401328:	39060260 	strb	w0, [x19, #384]
  40132c:	f9400bf3 	ldr	x19, [sp, #16]
  401330:	a8c27bfd 	ldp	x29, x30, [sp], #32
  401334:	d65f03c0 	ret

0000000000401338 <frame_dummy>:
  401338:	17ffffe6 	b	4012d0 <register_tm_clones>

000000000040133c <main>:
  40133c:	a9b87bfd 	stp	x29, x30, [sp, #-128]!
  401340:	910003fd 	mov	x29, sp
  401344:	b9001fa0 	str	w0, [x29, #28]
  401348:	f9000ba1 	str	x1, [x29, #16]
  40134c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401350:	912da000 	add	x0, x0, #0xb68
  401354:	97ffff57 	bl	4010b0 <system@plt>
  401358:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  40135c:	912e0000 	add	x0, x0, #0xb80
  401360:	97ffff54 	bl	4010b0 <system@plt>
  401364:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401368:	912e6000 	add	x0, x0, #0xb98
  40136c:	97ffff51 	bl	4010b0 <system@plt>
  401370:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401374:	912ec000 	add	x0, x0, #0xbb0
  401378:	97ffff4e 	bl	4010b0 <system@plt>
  40137c:	b9401fa0 	ldr	w0, [x29, #28]
  401380:	7100081f 	cmp	w0, #0x2
  401384:	54000100 	b.eq	4013a4 <main+0x68>  // b.none
  401388:	f9400ba0 	ldr	x0, [x29, #16]
  40138c:	f9400001 	ldr	x1, [x0]
  401390:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401394:	912f2000 	add	x0, x0, #0xbc8
  401398:	97ffff9e 	bl	401210 <printf@plt>
  40139c:	52800000 	mov	w0, #0x0                   	// #0
  4013a0:	97ffff04 	bl	400fb0 <exit@plt>
  4013a4:	94000591 	bl	4029e8 <trigger_open>
  4013a8:	f9400ba0 	ldr	x0, [x29, #16]
  4013ac:	91002000 	add	x0, x0, #0x8
  4013b0:	f9400000 	ldr	x0, [x0]
  4013b4:	97ffff17 	bl	401010 <atoi@plt>
  4013b8:	b9007fa0 	str	w0, [x29, #124]
  4013bc:	52800dc4 	mov	w4, #0x6e                  	// #110
  4013c0:	52800023 	mov	w3, #0x1                   	// #1
  4013c4:	52800102 	mov	w2, #0x8                   	// #8
  4013c8:	52984001 	mov	w1, #0xc200                	// #49664
  4013cc:	72a00021 	movk	w1, #0x1, lsl #16
  4013d0:	b9407fa0 	ldr	w0, [x29, #124]
  4013d4:	94000400 	bl	4023d4 <uart_init>
  4013d8:	910083a0 	add	x0, x29, #0x20
  4013dc:	97fffef9 	bl	400fc0 <pthread_attr_init@plt>
  4013e0:	f9003bbf 	str	xzr, [x29, #112]
  4013e4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4013e8:	91029002 	add	x2, x0, #0xa4
  4013ec:	910083a1 	add	x1, x29, #0x20
  4013f0:	9101c3a0 	add	x0, x29, #0x70
  4013f4:	d2800003 	mov	x3, #0x0                   	// #0
  4013f8:	97ffff36 	bl	4010d0 <pthread_create@plt>
  4013fc:	f90037bf 	str	xzr, [x29, #104]
  401400:	90000000 	adrp	x0, 401000 <localtime@plt>
  401404:	911b8002 	add	x2, x0, #0x6e0
  401408:	910083a1 	add	x1, x29, #0x20
  40140c:	9101a3a0 	add	x0, x29, #0x68
  401410:	d2800003 	mov	x3, #0x0                   	// #0
  401414:	97ffff2f 	bl	4010d0 <pthread_create@plt>
  401418:	f9403ba0 	ldr	x0, [x29, #112]
  40141c:	910183a1 	add	x1, x29, #0x60
  401420:	97ffff38 	bl	401100 <pthread_join@plt>
  401424:	f94037a0 	ldr	x0, [x29, #104]
  401428:	910183a1 	add	x1, x29, #0x60
  40142c:	97ffff35 	bl	401100 <pthread_join@plt>
  401430:	52800000 	mov	w0, #0x0                   	// #0
  401434:	a8c87bfd 	ldp	x29, x30, [sp], #128
  401438:	d65f03c0 	ret

000000000040143c <display_gps_time>:
  40143c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  401440:	910003fd 	mov	x29, sp
  401444:	f9000fa0 	str	x0, [x29, #24]
  401448:	910063a0 	add	x0, x29, #0x18
  40144c:	97ffff11 	bl	401090 <gmtime@plt>
  401450:	f90017a0 	str	x0, [x29, #40]
  401454:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401458:	91326002 	add	x2, x0, #0xc98
  40145c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401460:	912f8001 	add	x1, x0, #0xbe0
  401464:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401468:	912fa000 	add	x0, x0, #0xbe8
  40146c:	52800783 	mov	w3, #0x3c                  	// #60
  401470:	97ffff68 	bl	401210 <printf@plt>
  401474:	f94017a0 	ldr	x0, [x29, #40]
  401478:	b9400801 	ldr	w1, [x0, #8]
  40147c:	f94017a0 	ldr	x0, [x29, #40]
  401480:	b9400402 	ldr	w2, [x0, #4]
  401484:	f94017a0 	ldr	x0, [x29, #40]
  401488:	b9400003 	ldr	w3, [x0]
  40148c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401490:	91304000 	add	x0, x0, #0xc10
  401494:	97ffff5f 	bl	401210 <printf@plt>
  401498:	52800140 	mov	w0, #0xa                   	// #10
  40149c:	97ffff61 	bl	401220 <putchar@plt>
  4014a0:	52800000 	mov	w0, #0x0                   	// #0
  4014a4:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4014a8:	d65f03c0 	ret

00000000004014ac <display_gps_microsecond>:
  4014ac:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4014b0:	910003fd 	mov	x29, sp
  4014b4:	f9000fa0 	str	x0, [x29, #24]
  4014b8:	f9000ba1 	str	x1, [x29, #16]
  4014bc:	f9400fa1 	ldr	x1, [x29, #24]
  4014c0:	d2884800 	mov	x0, #0x4240                	// #16960
  4014c4:	f2a001e0 	movk	x0, #0xf, lsl #16
  4014c8:	9b007c21 	mul	x1, x1, x0
  4014cc:	f9400ba0 	ldr	x0, [x29, #16]
  4014d0:	8b000021 	add	x1, x1, x0
  4014d4:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  4014d8:	91064000 	add	x0, x0, #0x190
  4014dc:	f9000001 	str	x1, [x0]
  4014e0:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4014e4:	9132c002 	add	x2, x0, #0xcb0
  4014e8:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4014ec:	912f8001 	add	x1, x0, #0xbe0
  4014f0:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4014f4:	912fa000 	add	x0, x0, #0xbe8
  4014f8:	52800983 	mov	w3, #0x4c                  	// #76
  4014fc:	97ffff45 	bl	401210 <printf@plt>
  401500:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  401504:	91064000 	add	x0, x0, #0x190
  401508:	f9400001 	ldr	x1, [x0]
  40150c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401510:	9130c000 	add	x0, x0, #0xc30
  401514:	97ffff3f 	bl	401210 <printf@plt>
  401518:	52800140 	mov	w0, #0xa                   	// #10
  40151c:	97ffff41 	bl	401220 <putchar@plt>
  401520:	9400003b 	bl	40160c <get_system_time_microsecond>
  401524:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401528:	9132c002 	add	x2, x0, #0xcb0
  40152c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401530:	912f8001 	add	x1, x0, #0xbe0
  401534:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401538:	912fa000 	add	x0, x0, #0xbe8
  40153c:	528009e3 	mov	w3, #0x4f                  	// #79
  401540:	97ffff34 	bl	401210 <printf@plt>
  401544:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  401548:	91062000 	add	x0, x0, #0x188
  40154c:	f9400001 	ldr	x1, [x0]
  401550:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  401554:	91064000 	add	x0, x0, #0x190
  401558:	f9400000 	ldr	x0, [x0]
  40155c:	cb000021 	sub	x1, x1, x0
  401560:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401564:	91312000 	add	x0, x0, #0xc48
  401568:	97ffff2a 	bl	401210 <printf@plt>
  40156c:	52800140 	mov	w0, #0xa                   	// #10
  401570:	97ffff2c 	bl	401220 <putchar@plt>
  401574:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  401578:	91062000 	add	x0, x0, #0x188
  40157c:	f900001f 	str	xzr, [x0]
  401580:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  401584:	91064000 	add	x0, x0, #0x190
  401588:	f900001f 	str	xzr, [x0]
  40158c:	52800000 	mov	w0, #0x0                   	// #0
  401590:	a8c27bfd 	ldp	x29, x30, [sp], #32
  401594:	d65f03c0 	ret

0000000000401598 <get_system_time_second>:
  401598:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40159c:	910003fd 	mov	x29, sp
  4015a0:	910043a0 	add	x0, x29, #0x10
  4015a4:	97fffea3 	bl	401030 <time@plt>
  4015a8:	910043a0 	add	x0, x29, #0x10
  4015ac:	97fffe95 	bl	401000 <localtime@plt>
  4015b0:	f9000fa0 	str	x0, [x29, #24]
  4015b4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4015b8:	91332002 	add	x2, x0, #0xcc8
  4015bc:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4015c0:	912f8001 	add	x1, x0, #0xbe0
  4015c4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4015c8:	912fa000 	add	x0, x0, #0xbe8
  4015cc:	52800be3 	mov	w3, #0x5f                  	// #95
  4015d0:	97ffff10 	bl	401210 <printf@plt>
  4015d4:	f9400fa0 	ldr	x0, [x29, #24]
  4015d8:	b9400801 	ldr	w1, [x0, #8]
  4015dc:	f9400fa0 	ldr	x0, [x29, #24]
  4015e0:	b9400402 	ldr	w2, [x0, #4]
  4015e4:	f9400fa0 	ldr	x0, [x29, #24]
  4015e8:	b9400003 	ldr	w3, [x0]
  4015ec:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4015f0:	91318000 	add	x0, x0, #0xc60
  4015f4:	97ffff07 	bl	401210 <printf@plt>
  4015f8:	52800140 	mov	w0, #0xa                   	// #10
  4015fc:	97ffff09 	bl	401220 <putchar@plt>
  401600:	52800000 	mov	w0, #0x0                   	// #0
  401604:	a8c27bfd 	ldp	x29, x30, [sp], #32
  401608:	d65f03c0 	ret

000000000040160c <get_system_time_microsecond>:
  40160c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  401610:	910003fd 	mov	x29, sp
  401614:	910043a0 	add	x0, x29, #0x10
  401618:	aa0003e1 	mov	x1, x0
  40161c:	52800000 	mov	w0, #0x0                   	// #0
  401620:	97fffe6c 	bl	400fd0 <clock_gettime@plt>
  401624:	f9400ba0 	ldr	x0, [x29, #16]
  401628:	aa0003e1 	mov	x1, x0
  40162c:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  401630:	91062000 	add	x0, x0, #0x188
  401634:	f9000001 	str	x1, [x0]
  401638:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  40163c:	91062000 	add	x0, x0, #0x188
  401640:	f9400001 	ldr	x1, [x0]
  401644:	d2884800 	mov	x0, #0x4240                	// #16960
  401648:	f2a001e0 	movk	x0, #0xf, lsl #16
  40164c:	9b007c21 	mul	x1, x1, x0
  401650:	f9400fa0 	ldr	x0, [x29, #24]
  401654:	d29ef9e2 	mov	x2, #0xf7cf                	// #63439
  401658:	f2bc6a62 	movk	x2, #0xe353, lsl #16
  40165c:	f2d374a2 	movk	x2, #0x9ba5, lsl #32
  401660:	f2e41882 	movk	x2, #0x20c4, lsl #48
  401664:	9b427c02 	smulh	x2, x0, x2
  401668:	9347fc42 	asr	x2, x2, #7
  40166c:	937ffc00 	asr	x0, x0, #63
  401670:	cb000040 	sub	x0, x2, x0
  401674:	8b000021 	add	x1, x1, x0
  401678:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  40167c:	91062000 	add	x0, x0, #0x188
  401680:	f9000001 	str	x1, [x0]
  401684:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401688:	91338002 	add	x2, x0, #0xce0
  40168c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401690:	912f8001 	add	x1, x0, #0xbe0
  401694:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401698:	912fa000 	add	x0, x0, #0xbe8
  40169c:	52800d83 	mov	w3, #0x6c                  	// #108
  4016a0:	97fffedc 	bl	401210 <printf@plt>
  4016a4:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  4016a8:	91062000 	add	x0, x0, #0x188
  4016ac:	f9400001 	ldr	x1, [x0]
  4016b0:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4016b4:	91320000 	add	x0, x0, #0xc80
  4016b8:	97fffed6 	bl	401210 <printf@plt>
  4016bc:	52800140 	mov	w0, #0xa                   	// #10
  4016c0:	97fffed8 	bl	401220 <putchar@plt>
  4016c4:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  4016c8:	9105e000 	add	x0, x0, #0x178
  4016cc:	f9400000 	ldr	x0, [x0]
  4016d0:	97fffea8 	bl	401170 <fflush@plt>
  4016d4:	52800000 	mov	w0, #0x0                   	// #0
  4016d8:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4016dc:	d65f03c0 	ret

00000000004016e0 <display_system_time>:
  4016e0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4016e4:	910003fd 	mov	x29, sp
  4016e8:	f9000fa0 	str	x0, [x29, #24]
  4016ec:	940004e0 	bl	402a6c <trigger_jump>
  4016f0:	17ffffff 	b	4016ec <display_system_time+0xc>

00000000004016f4 <serial_open>:
  4016f4:	a9b57bfd 	stp	x29, x30, [sp, #-176]!
  4016f8:	910003fd 	mov	x29, sp
  4016fc:	b9001fa0 	str	w0, [x29, #28]
  401700:	b9401fa0 	ldr	w0, [x29, #28]
  401704:	7100001f 	cmp	w0, #0x0
  401708:	54000141 	b.ne	401730 <serial_open+0x3c>  // b.any
  40170c:	9100a3a2 	add	x2, x29, #0x28
  401710:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401714:	91340001 	add	x1, x0, #0xd00
  401718:	aa0203e0 	mov	x0, x2
  40171c:	f9400022 	ldr	x2, [x1]
  401720:	f9000002 	str	x2, [x0]
  401724:	f8405021 	ldur	x1, [x1, #5]
  401728:	f8005001 	stur	x1, [x0, #5]
  40172c:	14000021 	b	4017b0 <serial_open+0xbc>
  401730:	b9401fa0 	ldr	w0, [x29, #28]
  401734:	7100041f 	cmp	w0, #0x1
  401738:	54000141 	b.ne	401760 <serial_open+0x6c>  // b.any
  40173c:	9100a3a2 	add	x2, x29, #0x28
  401740:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401744:	91344001 	add	x1, x0, #0xd10
  401748:	aa0203e0 	mov	x0, x2
  40174c:	f9400022 	ldr	x2, [x1]
  401750:	f9000002 	str	x2, [x0]
  401754:	f8405021 	ldur	x1, [x1, #5]
  401758:	f8005001 	stur	x1, [x0, #5]
  40175c:	14000015 	b	4017b0 <serial_open+0xbc>
  401760:	b9401fa0 	ldr	w0, [x29, #28]
  401764:	7100081f 	cmp	w0, #0x2
  401768:	54000141 	b.ne	401790 <serial_open+0x9c>  // b.any
  40176c:	9100a3a2 	add	x2, x29, #0x28
  401770:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401774:	91348001 	add	x1, x0, #0xd20
  401778:	aa0203e0 	mov	x0, x2
  40177c:	f9400022 	ldr	x2, [x1]
  401780:	f9000002 	str	x2, [x0]
  401784:	f8405021 	ldur	x1, [x1, #5]
  401788:	f8005001 	stur	x1, [x0, #5]
  40178c:	14000009 	b	4017b0 <serial_open+0xbc>
  401790:	9100a3a2 	add	x2, x29, #0x28
  401794:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401798:	9134c001 	add	x1, x0, #0xd30
  40179c:	aa0203e0 	mov	x0, x2
  4017a0:	f9400022 	ldr	x2, [x1]
  4017a4:	f9000002 	str	x2, [x0]
  4017a8:	f8405021 	ldur	x1, [x1, #5]
  4017ac:	f8005001 	stur	x1, [x0, #5]
  4017b0:	9100a3a0 	add	x0, x29, #0x28
  4017b4:	52812041 	mov	w1, #0x902                 	// #2306
  4017b8:	97fffe22 	bl	401040 <open@plt>
  4017bc:	b900afa0 	str	w0, [x29, #172]
  4017c0:	b940afa0 	ldr	w0, [x29, #172]
  4017c4:	7100001f 	cmp	w0, #0x0
  4017c8:	5400020a 	b.ge	401808 <serial_open+0x114>  // b.tcont
  4017cc:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4017d0:	9103c002 	add	x2, x0, #0xf0
  4017d4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4017d8:	91350001 	add	x1, x0, #0xd40
  4017dc:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4017e0:	91354000 	add	x0, x0, #0xd50
  4017e4:	52800523 	mov	w3, #0x29                  	// #41
  4017e8:	97fffe8a 	bl	401210 <printf@plt>
  4017ec:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4017f0:	9135e000 	add	x0, x0, #0xd78
  4017f4:	97fffe87 	bl	401210 <printf@plt>
  4017f8:	52800140 	mov	w0, #0xa                   	// #10
  4017fc:	97fffe89 	bl	401220 <putchar@plt>
  401800:	52800020 	mov	w0, #0x1                   	// #1
  401804:	97fffdeb 	bl	400fb0 <exit@plt>
  401808:	52800002 	mov	w2, #0x0                   	// #0
  40180c:	52800081 	mov	w1, #0x4                   	// #4
  401810:	b940afa0 	ldr	w0, [x29, #172]
  401814:	97fffe53 	bl	401160 <fcntl@plt>
  401818:	7100001f 	cmp	w0, #0x0
  40181c:	5400020a 	b.ge	40185c <serial_open+0x168>  // b.tcont
  401820:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  401824:	9103c002 	add	x2, x0, #0xf0
  401828:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  40182c:	91350001 	add	x1, x0, #0xd40
  401830:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401834:	91354000 	add	x0, x0, #0xd50
  401838:	528005e3 	mov	w3, #0x2f                  	// #47
  40183c:	97fffe75 	bl	401210 <printf@plt>
  401840:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401844:	91364000 	add	x0, x0, #0xd90
  401848:	97fffe3a 	bl	401130 <puts@plt>
  40184c:	52800140 	mov	w0, #0xa                   	// #10
  401850:	97fffe74 	bl	401220 <putchar@plt>
  401854:	12800000 	mov	w0, #0xffffffff            	// #-1
  401858:	14000021 	b	4018dc <serial_open+0x1e8>
  40185c:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  401860:	9103c002 	add	x2, x0, #0xf0
  401864:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401868:	91350001 	add	x1, x0, #0xd40
  40186c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401870:	91354000 	add	x0, x0, #0xd50
  401874:	52800663 	mov	w3, #0x33                  	// #51
  401878:	97fffe66 	bl	401210 <printf@plt>
  40187c:	52800002 	mov	w2, #0x0                   	// #0
  401880:	52800081 	mov	w1, #0x4                   	// #4
  401884:	b940afa0 	ldr	w0, [x29, #172]
  401888:	97fffe36 	bl	401160 <fcntl@plt>
  40188c:	2a0003e1 	mov	w1, w0
  401890:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401894:	91368000 	add	x0, x0, #0xda0
  401898:	97fffe5e 	bl	401210 <printf@plt>
  40189c:	52800140 	mov	w0, #0xa                   	// #10
  4018a0:	97fffe60 	bl	401220 <putchar@plt>
  4018a4:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4018a8:	9103c002 	add	x2, x0, #0xf0
  4018ac:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4018b0:	91350001 	add	x1, x0, #0xd40
  4018b4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4018b8:	91354000 	add	x0, x0, #0xd50
  4018bc:	528006c3 	mov	w3, #0x36                  	// #54
  4018c0:	97fffe54 	bl	401210 <printf@plt>
  4018c4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4018c8:	9136c000 	add	x0, x0, #0xdb0
  4018cc:	97fffe19 	bl	401130 <puts@plt>
  4018d0:	52800140 	mov	w0, #0xa                   	// #10
  4018d4:	97fffe53 	bl	401220 <putchar@plt>
  4018d8:	b940afa0 	ldr	w0, [x29, #172]
  4018dc:	a8cb7bfd 	ldp	x29, x30, [sp], #176
  4018e0:	d65f03c0 	ret

00000000004018e4 <set_speed>:
  4018e4:	a9b57bfd 	stp	x29, x30, [sp, #-176]!
  4018e8:	910003fd 	mov	x29, sp
  4018ec:	b9001fa0 	str	w0, [x29, #28]
  4018f0:	b9001ba1 	str	w1, [x29, #24]
  4018f4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4018f8:	91374000 	add	x0, x0, #0xdd0
  4018fc:	910123a2 	add	x2, x29, #0x48
  401900:	aa0003e3 	mov	x3, x0
  401904:	a9400460 	ldp	x0, x1, [x3]
  401908:	a9000440 	stp	x0, x1, [x2]
  40190c:	a9410460 	ldp	x0, x1, [x3, #16]
  401910:	a9010440 	stp	x0, x1, [x2, #16]
  401914:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401918:	9137c000 	add	x0, x0, #0xdf0
  40191c:	9100a3a2 	add	x2, x29, #0x28
  401920:	aa0003e3 	mov	x3, x0
  401924:	a9400460 	ldp	x0, x1, [x3]
  401928:	a9000440 	stp	x0, x1, [x2]
  40192c:	a9410460 	ldp	x0, x1, [x3, #16]
  401930:	a9010440 	stp	x0, x1, [x2, #16]
  401934:	9101a3a0 	add	x0, x29, #0x68
  401938:	aa0003e1 	mov	x1, x0
  40193c:	b9401fa0 	ldr	w0, [x29, #28]
  401940:	97fffdac 	bl	400ff0 <tcgetattr@plt>
  401944:	b900afbf 	str	wzr, [x29, #172]
  401948:	14000037 	b	401a24 <set_speed+0x140>
  40194c:	b980afa0 	ldrsw	x0, [x29, #172]
  401950:	d37ef400 	lsl	x0, x0, #2
  401954:	9100a3a1 	add	x1, x29, #0x28
  401958:	b8606820 	ldr	w0, [x1, x0]
  40195c:	b9401ba1 	ldr	w1, [x29, #24]
  401960:	6b00003f 	cmp	w1, w0
  401964:	540005a1 	b.ne	401a18 <set_speed+0x134>  // b.any
  401968:	52800041 	mov	w1, #0x2                   	// #2
  40196c:	b9401fa0 	ldr	w0, [x29, #28]
  401970:	97fffd84 	bl	400f80 <tcflush@plt>
  401974:	b980afa0 	ldrsw	x0, [x29, #172]
  401978:	d37ef400 	lsl	x0, x0, #2
  40197c:	910123a1 	add	x1, x29, #0x48
  401980:	b8606820 	ldr	w0, [x1, x0]
  401984:	2a0003e1 	mov	w1, w0
  401988:	9101a3a0 	add	x0, x29, #0x68
  40198c:	97fffe19 	bl	4011f0 <cfsetispeed@plt>
  401990:	b980afa0 	ldrsw	x0, [x29, #172]
  401994:	d37ef400 	lsl	x0, x0, #2
  401998:	910123a1 	add	x1, x29, #0x48
  40199c:	b8606820 	ldr	w0, [x1, x0]
  4019a0:	2a0003e1 	mov	w1, w0
  4019a4:	9101a3a0 	add	x0, x29, #0x68
  4019a8:	97fffd8e 	bl	400fe0 <cfsetospeed@plt>
  4019ac:	9101a3a0 	add	x0, x29, #0x68
  4019b0:	aa0003e2 	mov	x2, x0
  4019b4:	52800001 	mov	w1, #0x0                   	// #0
  4019b8:	b9401fa0 	ldr	w0, [x29, #28]
  4019bc:	97fffdf9 	bl	4011a0 <tcsetattr@plt>
  4019c0:	b900aba0 	str	w0, [x29, #168]
  4019c4:	b940aba0 	ldr	w0, [x29, #168]
  4019c8:	7100001f 	cmp	w0, #0x0
  4019cc:	54000200 	b.eq	401a0c <set_speed+0x128>  // b.none
  4019d0:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4019d4:	91040002 	add	x2, x0, #0x100
  4019d8:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4019dc:	91350001 	add	x1, x0, #0xd40
  4019e0:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4019e4:	91354000 	add	x0, x0, #0xd50
  4019e8:	52800a63 	mov	w3, #0x53                  	// #83
  4019ec:	97fffe09 	bl	401210 <printf@plt>
  4019f0:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4019f4:	91370000 	add	x0, x0, #0xdc0
  4019f8:	97fffe06 	bl	401210 <printf@plt>
  4019fc:	52800140 	mov	w0, #0xa                   	// #10
  401a00:	97fffe08 	bl	401220 <putchar@plt>
  401a04:	12800000 	mov	w0, #0xffffffff            	// #-1
  401a08:	1400000b 	b	401a34 <set_speed+0x150>
  401a0c:	52800041 	mov	w1, #0x2                   	// #2
  401a10:	b9401fa0 	ldr	w0, [x29, #28]
  401a14:	97fffd5b 	bl	400f80 <tcflush@plt>
  401a18:	b940afa0 	ldr	w0, [x29, #172]
  401a1c:	11000400 	add	w0, w0, #0x1
  401a20:	b900afa0 	str	w0, [x29, #172]
  401a24:	b940afa0 	ldr	w0, [x29, #172]
  401a28:	71001c1f 	cmp	w0, #0x7
  401a2c:	54fff909 	b.ls	40194c <set_speed+0x68>  // b.plast
  401a30:	52800000 	mov	w0, #0x0                   	// #0
  401a34:	a8cb7bfd 	ldp	x29, x30, [sp], #176
  401a38:	d65f03c0 	ret

0000000000401a3c <set_parity>:
  401a3c:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  401a40:	910003fd 	mov	x29, sp
  401a44:	b9001fa0 	str	w0, [x29, #28]
  401a48:	b9001ba1 	str	w1, [x29, #24]
  401a4c:	b90017a2 	str	w2, [x29, #20]
  401a50:	b90013a3 	str	w3, [x29, #16]
  401a54:	910083a0 	add	x0, x29, #0x20
  401a58:	aa0003e1 	mov	x1, x0
  401a5c:	b9401fa0 	ldr	w0, [x29, #28]
  401a60:	97fffd64 	bl	400ff0 <tcgetattr@plt>
  401a64:	7100001f 	cmp	w0, #0x0
  401a68:	54000200 	b.eq	401aa8 <set_parity+0x6c>  // b.none
  401a6c:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  401a70:	91044002 	add	x2, x0, #0x110
  401a74:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401a78:	91350001 	add	x1, x0, #0xd40
  401a7c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401a80:	91354000 	add	x0, x0, #0xd50
  401a84:	52800d03 	mov	w3, #0x68                  	// #104
  401a88:	97fffde2 	bl	401210 <printf@plt>
  401a8c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401a90:	91384000 	add	x0, x0, #0xe10
  401a94:	97fffddf 	bl	401210 <printf@plt>
  401a98:	52800140 	mov	w0, #0xa                   	// #10
  401a9c:	97fffde1 	bl	401220 <putchar@plt>
  401aa0:	12800000 	mov	w0, #0xffffffff            	// #-1
  401aa4:	140000ab 	b	401d50 <set_parity+0x314>
  401aa8:	b9402ba0 	ldr	w0, [x29, #40]
  401aac:	121a7400 	and	w0, w0, #0xffffffcf
  401ab0:	b9002ba0 	str	w0, [x29, #40]
  401ab4:	b9401ba0 	ldr	w0, [x29, #24]
  401ab8:	71001c1f 	cmp	w0, #0x7
  401abc:	54000080 	b.eq	401acc <set_parity+0x90>  // b.none
  401ac0:	7100201f 	cmp	w0, #0x8
  401ac4:	540000c0 	b.eq	401adc <set_parity+0xa0>  // b.none
  401ac8:	14000009 	b	401aec <set_parity+0xb0>
  401acc:	b9402ba0 	ldr	w0, [x29, #40]
  401ad0:	321b0000 	orr	w0, w0, #0x20
  401ad4:	b9002ba0 	str	w0, [x29, #40]
  401ad8:	14000014 	b	401b28 <set_parity+0xec>
  401adc:	b9402ba0 	ldr	w0, [x29, #40]
  401ae0:	321c0400 	orr	w0, w0, #0x30
  401ae4:	b9002ba0 	str	w0, [x29, #40]
  401ae8:	14000010 	b	401b28 <set_parity+0xec>
  401aec:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  401af0:	91044002 	add	x2, x0, #0x110
  401af4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401af8:	91350001 	add	x1, x0, #0xd40
  401afc:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401b00:	91354000 	add	x0, x0, #0xd50
  401b04:	52800f23 	mov	w3, #0x79                  	// #121
  401b08:	97fffdc2 	bl	401210 <printf@plt>
  401b0c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401b10:	9138a000 	add	x0, x0, #0xe28
  401b14:	97fffdbf 	bl	401210 <printf@plt>
  401b18:	52800140 	mov	w0, #0xa                   	// #10
  401b1c:	97fffdc1 	bl	401220 <putchar@plt>
  401b20:	12800000 	mov	w0, #0xffffffff            	// #-1
  401b24:	1400008b 	b	401d50 <set_parity+0x314>
  401b28:	b94013a0 	ldr	w0, [x29, #16]
  401b2c:	71014c1f 	cmp	w0, #0x53
  401b30:	540005c0 	b.eq	401be8 <set_parity+0x1ac>  // b.none
  401b34:	71014c1f 	cmp	w0, #0x53
  401b38:	5400010c 	b.gt	401b58 <set_parity+0x11c>
  401b3c:	7101381f 	cmp	w0, #0x4e
  401b40:	54000240 	b.eq	401b88 <set_parity+0x14c>  // b.none
  401b44:	71013c1f 	cmp	w0, #0x4f
  401b48:	540002e0 	b.eq	401ba4 <set_parity+0x168>  // b.none
  401b4c:	7101141f 	cmp	w0, #0x45
  401b50:	54000380 	b.eq	401bc0 <set_parity+0x184>  // b.none
  401b54:	1400002c 	b	401c04 <set_parity+0x1c8>
  401b58:	7101b81f 	cmp	w0, #0x6e
  401b5c:	54000160 	b.eq	401b88 <set_parity+0x14c>  // b.none
  401b60:	7101b81f 	cmp	w0, #0x6e
  401b64:	5400008c 	b.gt	401b74 <set_parity+0x138>
  401b68:	7101941f 	cmp	w0, #0x65
  401b6c:	540002a0 	b.eq	401bc0 <set_parity+0x184>  // b.none
  401b70:	14000025 	b	401c04 <set_parity+0x1c8>
  401b74:	7101bc1f 	cmp	w0, #0x6f
  401b78:	54000160 	b.eq	401ba4 <set_parity+0x168>  // b.none
  401b7c:	7101cc1f 	cmp	w0, #0x73
  401b80:	54000340 	b.eq	401be8 <set_parity+0x1ac>  // b.none
  401b84:	14000020 	b	401c04 <set_parity+0x1c8>
  401b88:	b9402ba0 	ldr	w0, [x29, #40]
  401b8c:	12177800 	and	w0, w0, #0xfffffeff
  401b90:	b9002ba0 	str	w0, [x29, #40]
  401b94:	b94023a0 	ldr	w0, [x29, #32]
  401b98:	121b7800 	and	w0, w0, #0xffffffef
  401b9c:	b90023a0 	str	w0, [x29, #32]
  401ba0:	14000028 	b	401c40 <set_parity+0x204>
  401ba4:	b9402ba0 	ldr	w0, [x29, #40]
  401ba8:	32180400 	orr	w0, w0, #0x300
  401bac:	b9002ba0 	str	w0, [x29, #40]
  401bb0:	b94023a0 	ldr	w0, [x29, #32]
  401bb4:	321c0000 	orr	w0, w0, #0x10
  401bb8:	b90023a0 	str	w0, [x29, #32]
  401bbc:	14000021 	b	401c40 <set_parity+0x204>
  401bc0:	b9402ba0 	ldr	w0, [x29, #40]
  401bc4:	32180000 	orr	w0, w0, #0x100
  401bc8:	b9002ba0 	str	w0, [x29, #40]
  401bcc:	b9402ba0 	ldr	w0, [x29, #40]
  401bd0:	12167800 	and	w0, w0, #0xfffffdff
  401bd4:	b9002ba0 	str	w0, [x29, #40]
  401bd8:	b94023a0 	ldr	w0, [x29, #32]
  401bdc:	321c0000 	orr	w0, w0, #0x10
  401be0:	b90023a0 	str	w0, [x29, #32]
  401be4:	14000017 	b	401c40 <set_parity+0x204>
  401be8:	b9402ba0 	ldr	w0, [x29, #40]
  401bec:	12177800 	and	w0, w0, #0xfffffeff
  401bf0:	b9002ba0 	str	w0, [x29, #40]
  401bf4:	b9402ba0 	ldr	w0, [x29, #40]
  401bf8:	12197800 	and	w0, w0, #0xffffffbf
  401bfc:	b9002ba0 	str	w0, [x29, #40]
  401c00:	14000010 	b	401c40 <set_parity+0x204>
  401c04:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  401c08:	91044002 	add	x2, x0, #0x110
  401c0c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401c10:	91350001 	add	x1, x0, #0xd40
  401c14:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401c18:	91354000 	add	x0, x0, #0xd50
  401c1c:	52801323 	mov	w3, #0x99                  	// #153
  401c20:	97fffd7c 	bl	401210 <printf@plt>
  401c24:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401c28:	91390000 	add	x0, x0, #0xe40
  401c2c:	97fffd79 	bl	401210 <printf@plt>
  401c30:	52800140 	mov	w0, #0xa                   	// #10
  401c34:	97fffd7b 	bl	401220 <putchar@plt>
  401c38:	12800000 	mov	w0, #0xffffffff            	// #-1
  401c3c:	14000045 	b	401d50 <set_parity+0x314>
  401c40:	b94017a0 	ldr	w0, [x29, #20]
  401c44:	7100041f 	cmp	w0, #0x1
  401c48:	54000080 	b.eq	401c58 <set_parity+0x21c>  // b.none
  401c4c:	7100081f 	cmp	w0, #0x2
  401c50:	540000c0 	b.eq	401c68 <set_parity+0x22c>  // b.none
  401c54:	14000009 	b	401c78 <set_parity+0x23c>
  401c58:	b9402ba0 	ldr	w0, [x29, #40]
  401c5c:	12197800 	and	w0, w0, #0xffffffbf
  401c60:	b9002ba0 	str	w0, [x29, #40]
  401c64:	14000014 	b	401cb4 <set_parity+0x278>
  401c68:	b9402ba0 	ldr	w0, [x29, #40]
  401c6c:	321a0000 	orr	w0, w0, #0x40
  401c70:	b9002ba0 	str	w0, [x29, #40]
  401c74:	14000010 	b	401cb4 <set_parity+0x278>
  401c78:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  401c7c:	91044002 	add	x2, x0, #0x110
  401c80:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401c84:	91350001 	add	x1, x0, #0xd40
  401c88:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401c8c:	91354000 	add	x0, x0, #0xd50
  401c90:	528014c3 	mov	w3, #0xa6                  	// #166
  401c94:	97fffd5f 	bl	401210 <printf@plt>
  401c98:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401c9c:	91396000 	add	x0, x0, #0xe58
  401ca0:	97fffd5c 	bl	401210 <printf@plt>
  401ca4:	52800140 	mov	w0, #0xa                   	// #10
  401ca8:	97fffd5e 	bl	401220 <putchar@plt>
  401cac:	12800000 	mov	w0, #0xffffffff            	// #-1
  401cb0:	14000028 	b	401d50 <set_parity+0x314>
  401cb4:	b94013a0 	ldr	w0, [x29, #16]
  401cb8:	7101b81f 	cmp	w0, #0x6e
  401cbc:	54000080 	b.eq	401ccc <set_parity+0x290>  // b.none
  401cc0:	b94023a0 	ldr	w0, [x29, #32]
  401cc4:	321c0000 	orr	w0, w0, #0x10
  401cc8:	b90023a0 	str	w0, [x29, #32]
  401ccc:	52800001 	mov	w1, #0x0                   	// #0
  401cd0:	b9401fa0 	ldr	w0, [x29, #28]
  401cd4:	97fffcab 	bl	400f80 <tcflush@plt>
  401cd8:	52800020 	mov	w0, #0x1                   	// #1
  401cdc:	3900dba0 	strb	w0, [x29, #54]
  401ce0:	52800020 	mov	w0, #0x1                   	// #1
  401ce4:	3900dfa0 	strb	w0, [x29, #55]
  401ce8:	b9402fa0 	ldr	w0, [x29, #44]
  401cec:	121c7800 	and	w0, w0, #0xfffffff7
  401cf0:	b9002fa0 	str	w0, [x29, #44]
  401cf4:	910083a0 	add	x0, x29, #0x20
  401cf8:	aa0003e2 	mov	x2, x0
  401cfc:	52800001 	mov	w1, #0x0                   	// #0
  401d00:	b9401fa0 	ldr	w0, [x29, #28]
  401d04:	97fffd27 	bl	4011a0 <tcsetattr@plt>
  401d08:	7100001f 	cmp	w0, #0x0
  401d0c:	54000200 	b.eq	401d4c <set_parity+0x310>  // b.none
  401d10:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  401d14:	91044002 	add	x2, x0, #0x110
  401d18:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401d1c:	91350001 	add	x1, x0, #0xd40
  401d20:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401d24:	91354000 	add	x0, x0, #0xd50
  401d28:	52801683 	mov	w3, #0xb4                  	// #180
  401d2c:	97fffd39 	bl	401210 <printf@plt>
  401d30:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401d34:	9139c000 	add	x0, x0, #0xe70
  401d38:	97fffd36 	bl	401210 <printf@plt>
  401d3c:	52800140 	mov	w0, #0xa                   	// #10
  401d40:	97fffd38 	bl	401220 <putchar@plt>
  401d44:	12800000 	mov	w0, #0xffffffff            	// #-1
  401d48:	14000002 	b	401d50 <set_parity+0x314>
  401d4c:	52800020 	mov	w0, #0x1                   	// #1
  401d50:	a8c67bfd 	ldp	x29, x30, [sp], #96
  401d54:	d65f03c0 	ret

0000000000401d58 <receive_data_analy>:
  401d58:	a9ac7bfd 	stp	x29, x30, [sp, #-320]!
  401d5c:	910003fd 	mov	x29, sp
  401d60:	b9001fa0 	str	w0, [x29, #28]
  401d64:	f9000ba1 	str	x1, [x29, #16]
  401d68:	b9401fa0 	ldr	w0, [x29, #28]
  401d6c:	b9013fa0 	str	w0, [x29, #316]
  401d70:	9100a3a0 	add	x0, x29, #0x28
  401d74:	d2802001 	mov	x1, #0x100                 	// #256
  401d78:	aa0103e2 	mov	x2, x1
  401d7c:	52800001 	mov	w1, #0x0                   	// #0
  401d80:	97fffcc0 	bl	401080 <memset@plt>
  401d84:	3904efbf 	strb	wzr, [x29, #315]
  401d88:	b9012fbf 	str	wzr, [x29, #300]
  401d8c:	f9400ba0 	ldr	x0, [x29, #16]
  401d90:	f9009ba0 	str	x0, [x29, #304]
  401d94:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  401d98:	91048002 	add	x2, x0, #0x120
  401d9c:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401da0:	91350001 	add	x1, x0, #0xd40
  401da4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401da8:	91354000 	add	x0, x0, #0xd50
  401dac:	52801903 	mov	w3, #0xc8                  	// #200
  401db0:	97fffd18 	bl	401210 <printf@plt>
  401db4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401db8:	913a4000 	add	x0, x0, #0xe90
  401dbc:	f9409ba1 	ldr	x1, [x29, #304]
  401dc0:	97fffd14 	bl	401210 <printf@plt>
  401dc4:	52800140 	mov	w0, #0xa                   	// #10
  401dc8:	97fffd16 	bl	401220 <putchar@plt>
  401dcc:	14000052 	b	401f14 <receive_data_analy+0x1bc>
  401dd0:	3944efa0 	ldrb	w0, [x29, #315]
  401dd4:	7100001f 	cmp	w0, #0x0
  401dd8:	54000181 	b.ne	401e08 <receive_data_analy+0xb0>  // b.any
  401ddc:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401de0:	913a8000 	add	x0, x0, #0xea0
  401de4:	d2800142 	mov	x2, #0xa                   	// #10
  401de8:	aa0003e1 	mov	x1, x0
  401dec:	f9409ba0 	ldr	x0, [x29, #304]
  401df0:	97fffc9c 	bl	401060 <strncmp@plt>
  401df4:	7100001f 	cmp	w0, #0x0
  401df8:	54000801 	b.ne	401ef8 <receive_data_analy+0x1a0>  // b.any
  401dfc:	52800020 	mov	w0, #0x1                   	// #1
  401e00:	3904efa0 	strb	w0, [x29, #315]
  401e04:	b9012fbf 	str	wzr, [x29, #300]
  401e08:	b9412fa0 	ldr	w0, [x29, #300]
  401e0c:	7102581f 	cmp	w0, #0x96
  401e10:	540000e9 	b.ls	401e2c <receive_data_analy+0xd4>  // b.plast
  401e14:	f9409ba0 	ldr	x0, [x29, #304]
  401e18:	39400000 	ldrb	w0, [x0]
  401e1c:	7100281f 	cmp	w0, #0xa
  401e20:	54000061 	b.ne	401e2c <receive_data_analy+0xd4>  // b.any
  401e24:	52800040 	mov	w0, #0x2                   	// #2
  401e28:	3904efa0 	strb	w0, [x29, #315]
  401e2c:	3944efa0 	ldrb	w0, [x29, #315]
  401e30:	7100041f 	cmp	w0, #0x1
  401e34:	540002a1 	b.ne	401e88 <receive_data_analy+0x130>  // b.any
  401e38:	b9412fa0 	ldr	w0, [x29, #300]
  401e3c:	11000401 	add	w1, w0, #0x1
  401e40:	b9012fa1 	str	w1, [x29, #300]
  401e44:	f9409ba1 	ldr	x1, [x29, #304]
  401e48:	39400022 	ldrb	w2, [x1]
  401e4c:	2a0003e0 	mov	w0, w0
  401e50:	9100a3a1 	add	x1, x29, #0x28
  401e54:	38206822 	strb	w2, [x1, x0]
  401e58:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  401e5c:	91048002 	add	x2, x0, #0x120
  401e60:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401e64:	91350001 	add	x1, x0, #0xd40
  401e68:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401e6c:	91354000 	add	x0, x0, #0xd50
  401e70:	52801b83 	mov	w3, #0xdc                  	// #220
  401e74:	97fffce7 	bl	401210 <printf@plt>
  401e78:	9100a3a0 	add	x0, x29, #0x28
  401e7c:	97fffcad 	bl	401130 <puts@plt>
  401e80:	52800140 	mov	w0, #0xa                   	// #10
  401e84:	97fffce7 	bl	401220 <putchar@plt>
  401e88:	3944efa0 	ldrb	w0, [x29, #315]
  401e8c:	7100081f 	cmp	w0, #0x2
  401e90:	54000361 	b.ne	401efc <receive_data_analy+0x1a4>  // b.any
  401e94:	b9412fa0 	ldr	w0, [x29, #300]
  401e98:	9100a3a1 	add	x1, x29, #0x28
  401e9c:	3820683f 	strb	wzr, [x1, x0]
  401ea0:	d0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  401ea4:	91048002 	add	x2, x0, #0x120
  401ea8:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401eac:	91350001 	add	x1, x0, #0xd40
  401eb0:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401eb4:	91354000 	add	x0, x0, #0xd50
  401eb8:	52801c23 	mov	w3, #0xe1                  	// #225
  401ebc:	97fffcd5 	bl	401210 <printf@plt>
  401ec0:	9100a3a1 	add	x1, x29, #0x28
  401ec4:	b0000000 	adrp	x0, 402000 <uart_receive+0xd4>
  401ec8:	913ac000 	add	x0, x0, #0xeb0
  401ecc:	97fffcd1 	bl	401210 <printf@plt>
  401ed0:	52800140 	mov	w0, #0xa                   	// #10
  401ed4:	97fffcd3 	bl	401220 <putchar@plt>
  401ed8:	9100a3a0 	add	x0, x29, #0x28
  401edc:	9400017f 	bl	4024d8 <time_analysis>
  401ee0:	9100a3a0 	add	x0, x29, #0x28
  401ee4:	d2802002 	mov	x2, #0x100                 	// #256
  401ee8:	52800001 	mov	w1, #0x0                   	// #0
  401eec:	97fffc65 	bl	401080 <memset@plt>
  401ef0:	3904efbf 	strb	wzr, [x29, #315]
  401ef4:	14000002 	b	401efc <receive_data_analy+0x1a4>
  401ef8:	d503201f 	nop
  401efc:	b9413fa0 	ldr	w0, [x29, #316]
  401f00:	51000400 	sub	w0, w0, #0x1
  401f04:	b9013fa0 	str	w0, [x29, #316]
  401f08:	f9409ba0 	ldr	x0, [x29, #304]
  401f0c:	91000400 	add	x0, x0, #0x1
  401f10:	f9009ba0 	str	x0, [x29, #304]
  401f14:	b9413fa0 	ldr	w0, [x29, #316]
  401f18:	7100001f 	cmp	w0, #0x0
  401f1c:	54fff5ac 	b.gt	401dd0 <receive_data_analy+0x78>
  401f20:	52800000 	mov	w0, #0x0                   	// #0
  401f24:	a8d47bfd 	ldp	x29, x30, [sp], #320
  401f28:	d65f03c0 	ret

0000000000401f2c <uart_receive>:
  401f2c:	a9b37bfd 	stp	x29, x30, [sp, #-208]!
  401f30:	910003fd 	mov	x29, sp
  401f34:	f9000fa0 	str	x0, [x29, #24]
  401f38:	b90017a1 	str	w1, [x29, #20]
  401f3c:	9100e3a0 	add	x0, x29, #0x38
  401f40:	f90063a0 	str	x0, [x29, #192]
  401f44:	b900cfbf 	str	wzr, [x29, #204]
  401f48:	14000007 	b	401f64 <uart_receive+0x38>
  401f4c:	f94063a0 	ldr	x0, [x29, #192]
  401f50:	b940cfa1 	ldr	w1, [x29, #204]
  401f54:	f821781f 	str	xzr, [x0, x1, lsl #3]
  401f58:	b940cfa0 	ldr	w0, [x29, #204]
  401f5c:	11000400 	add	w0, w0, #0x1
  401f60:	b900cfa0 	str	w0, [x29, #204]
  401f64:	b940cfa0 	ldr	w0, [x29, #204]
  401f68:	71003c1f 	cmp	w0, #0xf
  401f6c:	54ffff09 	b.ls	401f4c <uart_receive+0x20>  // b.plast
  401f70:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  401f74:	91067000 	add	x0, x0, #0x19c
  401f78:	b9400000 	ldr	w0, [x0]
  401f7c:	1100fc01 	add	w1, w0, #0x3f
  401f80:	7100001f 	cmp	w0, #0x0
  401f84:	1a80b020 	csel	w0, w1, w0, lt  // lt = tstop
  401f88:	13067c00 	asr	w0, w0, #6
  401f8c:	2a0003e3 	mov	w3, w0
  401f90:	93407c60 	sxtw	x0, w3
  401f94:	d37df000 	lsl	x0, x0, #3
  401f98:	9100e3a1 	add	x1, x29, #0x38
  401f9c:	f8606821 	ldr	x1, [x1, x0]
  401fa0:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  401fa4:	91067000 	add	x0, x0, #0x19c
  401fa8:	b9400000 	ldr	w0, [x0]
  401fac:	6b0003e2 	negs	w2, w0
  401fb0:	12001400 	and	w0, w0, #0x3f
  401fb4:	12001442 	and	w2, w2, #0x3f
  401fb8:	5a824400 	csneg	w0, w0, w2, mi  // mi = first
  401fbc:	d2800022 	mov	x2, #0x1                   	// #1
  401fc0:	9ac02040 	lsl	x0, x2, x0
  401fc4:	aa000022 	orr	x2, x1, x0
  401fc8:	93407c60 	sxtw	x0, w3
  401fcc:	d37df000 	lsl	x0, x0, #3
  401fd0:	9100e3a1 	add	x1, x29, #0x38
  401fd4:	f8206822 	str	x2, [x1, x0]
  401fd8:	d2800140 	mov	x0, #0xa                   	// #10
  401fdc:	f90017a0 	str	x0, [x29, #40]
  401fe0:	f9001bbf 	str	xzr, [x29, #48]
  401fe4:	f0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  401fe8:	91067000 	add	x0, x0, #0x19c
  401fec:	b9400000 	ldr	w0, [x0]
  401ff0:	11000400 	add	w0, w0, #0x1
  401ff4:	9100a3a2 	add	x2, x29, #0x28
  401ff8:	9100e3a1 	add	x1, x29, #0x38
  401ffc:	aa0203e4 	mov	x4, x2
  402000:	d2800003 	mov	x3, #0x0                   	// #0
  402004:	d2800002 	mov	x2, #0x0                   	// #0
  402008:	97fffc6a 	bl	4011b0 <select@plt>
  40200c:	b900bfa0 	str	w0, [x29, #188]
  402010:	b940bfa0 	ldr	w0, [x29, #188]
  402014:	7100001f 	cmp	w0, #0x0
  402018:	54000160 	b.eq	402044 <uart_receive+0x118>  // b.none
  40201c:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402020:	91067000 	add	x0, x0, #0x19c
  402024:	b9400000 	ldr	w0, [x0]
  402028:	b98017a1 	ldrsw	x1, [x29, #20]
  40202c:	aa0103e2 	mov	x2, x1
  402030:	f9400fa1 	ldr	x1, [x29, #24]
  402034:	97fffc57 	bl	401190 <read@plt>
  402038:	b900bba0 	str	w0, [x29, #184]
  40203c:	b940bba0 	ldr	w0, [x29, #184]
  402040:	14000002 	b	402048 <uart_receive+0x11c>
  402044:	52800000 	mov	w0, #0x0                   	// #0
  402048:	a8cd7bfd 	ldp	x29, x30, [sp], #208
  40204c:	d65f03c0 	ret

0000000000402050 <uart_send>:
  402050:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  402054:	910003fd 	mov	x29, sp
  402058:	f9000fa0 	str	x0, [x29, #24]
  40205c:	b90017a1 	str	w1, [x29, #20]
  402060:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402064:	91067000 	add	x0, x0, #0x19c
  402068:	b9400000 	ldr	w0, [x0]
  40206c:	b98017a1 	ldrsw	x1, [x29, #20]
  402070:	aa0103e2 	mov	x2, x1
  402074:	f9400fa1 	ldr	x1, [x29, #24]
  402078:	97fffc1e 	bl	4010f0 <write@plt>
  40207c:	b9002fa0 	str	w0, [x29, #44]
  402080:	b9402fa1 	ldr	w1, [x29, #44]
  402084:	b94017a0 	ldr	w0, [x29, #20]
  402088:	6b00003f 	cmp	w1, w0
  40208c:	54000061 	b.ne	402098 <uart_send+0x48>  // b.any
  402090:	b9402fa0 	ldr	w0, [x29, #44]
  402094:	14000002 	b	40209c <uart_send+0x4c>
  402098:	12800000 	mov	w0, #0xffffffff            	// #-1
  40209c:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4020a0:	d65f03c0 	ret

00000000004020a4 <uart_receive_thread>:
  4020a4:	a9ad7bfd 	stp	x29, x30, [sp, #-304]!
  4020a8:	910003fd 	mov	x29, sp
  4020ac:	f9000fa0 	str	x0, [x29, #24]
  4020b0:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  4020b4:	91067000 	add	x0, x0, #0x19c
  4020b8:	b9400000 	ldr	w0, [x0]
  4020bc:	7100001f 	cmp	w0, #0x0
  4020c0:	5400006a 	b.ge	4020cc <uart_receive_thread+0x28>  // b.tcont
  4020c4:	d2800000 	mov	x0, #0x0                   	// #0
  4020c8:	97fffc16 	bl	401120 <pthread_exit@plt>
  4020cc:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4020d0:	9104e002 	add	x2, x0, #0x138
  4020d4:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4020d8:	91350001 	add	x1, x0, #0xd40
  4020dc:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4020e0:	91354000 	add	x0, x0, #0xd50
  4020e4:	52802423 	mov	w3, #0x121                 	// #289
  4020e8:	97fffc4a 	bl	401210 <printf@plt>
  4020ec:	97fffbcd 	bl	401020 <getpid@plt>
  4020f0:	2a0003e1 	mov	w1, w0
  4020f4:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4020f8:	913b0000 	add	x0, x0, #0xec0
  4020fc:	97fffc45 	bl	401210 <printf@plt>
  402100:	52800140 	mov	w0, #0xa                   	// #10
  402104:	97fffc47 	bl	401220 <putchar@plt>
  402108:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  40210c:	91066000 	add	x0, x0, #0x198
  402110:	52800021 	mov	w1, #0x1                   	// #1
  402114:	39000001 	strb	w1, [x0]
  402118:	14000032 	b	4021e0 <uart_receive_thread+0x13c>
  40211c:	9100a3a0 	add	x0, x29, #0x28
  402120:	d2802002 	mov	x2, #0x100                 	// #256
  402124:	52800001 	mov	w1, #0x0                   	// #0
  402128:	97fffbd6 	bl	401080 <memset@plt>
  40212c:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402130:	91067000 	add	x0, x0, #0x19c
  402134:	b9400000 	ldr	w0, [x0]
  402138:	9100a3a1 	add	x1, x29, #0x28
  40213c:	d2802002 	mov	x2, #0x100                 	// #256
  402140:	97fffc14 	bl	401190 <read@plt>
  402144:	b9012fa0 	str	w0, [x29, #300]
  402148:	b9412fa0 	ldr	w0, [x29, #300]
  40214c:	7100001f 	cmp	w0, #0x0
  402150:	5400020a 	b.ge	402190 <uart_receive_thread+0xec>  // b.tcont
  402154:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402158:	9104e002 	add	x2, x0, #0x138
  40215c:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402160:	91350001 	add	x1, x0, #0xd40
  402164:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402168:	91354000 	add	x0, x0, #0xd50
  40216c:	52802563 	mov	w3, #0x12b                 	// #299
  402170:	97fffc28 	bl	401210 <printf@plt>
  402174:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402178:	913b8000 	add	x0, x0, #0xee0
  40217c:	b9412fa1 	ldr	w1, [x29, #300]
  402180:	97fffc24 	bl	401210 <printf@plt>
  402184:	52800140 	mov	w0, #0xa                   	// #10
  402188:	97fffc26 	bl	401220 <putchar@plt>
  40218c:	1400001a 	b	4021f4 <uart_receive_thread+0x150>
  402190:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402194:	9104e002 	add	x2, x0, #0x138
  402198:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  40219c:	91350001 	add	x1, x0, #0xd40
  4021a0:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4021a4:	91354000 	add	x0, x0, #0xd50
  4021a8:	528025e3 	mov	w3, #0x12f                 	// #303
  4021ac:	97fffc19 	bl	401210 <printf@plt>
  4021b0:	9100a3a1 	add	x1, x29, #0x28
  4021b4:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4021b8:	913c2000 	add	x0, x0, #0xf08
  4021bc:	aa0103e2 	mov	x2, x1
  4021c0:	b9412fa1 	ldr	w1, [x29, #300]
  4021c4:	97fffc13 	bl	401210 <printf@plt>
  4021c8:	52800140 	mov	w0, #0xa                   	// #10
  4021cc:	97fffc15 	bl	401220 <putchar@plt>
  4021d0:	9100a3a0 	add	x0, x29, #0x28
  4021d4:	aa0003e1 	mov	x1, x0
  4021d8:	b9412fa0 	ldr	w0, [x29, #300]
  4021dc:	97fffedf 	bl	401d58 <receive_data_analy>
  4021e0:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  4021e4:	91066000 	add	x0, x0, #0x198
  4021e8:	39400000 	ldrb	w0, [x0]
  4021ec:	7100001f 	cmp	w0, #0x0
  4021f0:	54fff961 	b.ne	40211c <uart_receive_thread+0x78>  // b.any
  4021f4:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4021f8:	9104e002 	add	x2, x0, #0x138
  4021fc:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402200:	91350001 	add	x1, x0, #0xd40
  402204:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402208:	91354000 	add	x0, x0, #0xd50
  40220c:	52802683 	mov	w3, #0x134                 	// #308
  402210:	97fffc00 	bl	401210 <printf@plt>
  402214:	97fffb83 	bl	401020 <getpid@plt>
  402218:	2a0003e1 	mov	w1, w0
  40221c:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402220:	913ce000 	add	x0, x0, #0xf38
  402224:	97fffbfb 	bl	401210 <printf@plt>
  402228:	52800140 	mov	w0, #0xa                   	// #10
  40222c:	97fffbfd 	bl	401220 <putchar@plt>
  402230:	d2800000 	mov	x0, #0x0                   	// #0
  402234:	97fffbbb 	bl	401120 <pthread_exit@plt>

0000000000402238 <uart_send_thread>:
  402238:	a9ac7bfd 	stp	x29, x30, [sp, #-320]!
  40223c:	910003fd 	mov	x29, sp
  402240:	f9000bf3 	str	x19, [sp, #16]
  402244:	f90017a0 	str	x0, [x29, #40]
  402248:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  40224c:	913f2000 	add	x0, x0, #0xfc8
  402250:	f9400000 	ldr	x0, [x0]
  402254:	f9001fa0 	str	x0, [x29, #56]
  402258:	910103a0 	add	x0, x29, #0x40
  40225c:	d2801f01 	mov	x1, #0xf8                  	// #248
  402260:	aa0103e2 	mov	x2, x1
  402264:	52800001 	mov	w1, #0x0                   	// #0
  402268:	97fffb86 	bl	401080 <memset@plt>
  40226c:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402270:	91067000 	add	x0, x0, #0x19c
  402274:	b9400000 	ldr	w0, [x0]
  402278:	7100001f 	cmp	w0, #0x0
  40227c:	5400006a 	b.ge	402288 <uart_send_thread+0x50>  // b.tcont
  402280:	d2800000 	mov	x0, #0x0                   	// #0
  402284:	97fffba7 	bl	401120 <pthread_exit@plt>
  402288:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  40228c:	91054002 	add	x2, x0, #0x150
  402290:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402294:	91350001 	add	x1, x0, #0xd40
  402298:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  40229c:	91354000 	add	x0, x0, #0xd50
  4022a0:	52802863 	mov	w3, #0x143                 	// #323
  4022a4:	97fffbdb 	bl	401210 <printf@plt>
  4022a8:	97fffb5e 	bl	401020 <getpid@plt>
  4022ac:	2a0003e1 	mov	w1, w0
  4022b0:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4022b4:	913d6000 	add	x0, x0, #0xf58
  4022b8:	97fffbd6 	bl	401210 <printf@plt>
  4022bc:	52800140 	mov	w0, #0xa                   	// #10
  4022c0:	97fffbd8 	bl	401220 <putchar@plt>
  4022c4:	1400002e 	b	40237c <uart_send_thread+0x144>
  4022c8:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4022cc:	91054002 	add	x2, x0, #0x150
  4022d0:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4022d4:	91350001 	add	x1, x0, #0xd40
  4022d8:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4022dc:	91354000 	add	x0, x0, #0xd50
  4022e0:	528028c3 	mov	w3, #0x146                 	// #326
  4022e4:	97fffbcb 	bl	401210 <printf@plt>
  4022e8:	9100e3a1 	add	x1, x29, #0x38
  4022ec:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4022f0:	913de000 	add	x0, x0, #0xf78
  4022f4:	97fffbc7 	bl	401210 <printf@plt>
  4022f8:	52800140 	mov	w0, #0xa                   	// #10
  4022fc:	97fffbc9 	bl	401220 <putchar@plt>
  402300:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402304:	91067000 	add	x0, x0, #0x19c
  402308:	b9400013 	ldr	w19, [x0]
  40230c:	9100e3a0 	add	x0, x29, #0x38
  402310:	97fffb24 	bl	400fa0 <strlen@plt>
  402314:	91000401 	add	x1, x0, #0x1
  402318:	9100e3a0 	add	x0, x29, #0x38
  40231c:	aa0103e2 	mov	x2, x1
  402320:	aa0003e1 	mov	x1, x0
  402324:	2a1303e0 	mov	w0, w19
  402328:	97fffb72 	bl	4010f0 <write@plt>
  40232c:	b9013fa0 	str	w0, [x29, #316]
  402330:	b9413fa0 	ldr	w0, [x29, #316]
  402334:	7100001f 	cmp	w0, #0x0
  402338:	540001cc 	b.gt	402370 <uart_send_thread+0x138>
  40233c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402340:	91054002 	add	x2, x0, #0x150
  402344:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402348:	91350001 	add	x1, x0, #0xd40
  40234c:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402350:	91354000 	add	x0, x0, #0xd50
  402354:	52802963 	mov	w3, #0x14b                 	// #331
  402358:	97fffbae 	bl	401210 <printf@plt>
  40235c:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402360:	913e6000 	add	x0, x0, #0xf98
  402364:	97fffb73 	bl	401130 <puts@plt>
  402368:	52800140 	mov	w0, #0xa                   	// #10
  40236c:	97fffbad 	bl	401220 <putchar@plt>
  402370:	52884800 	mov	w0, #0x4240                	// #16960
  402374:	72a001e0 	movk	w0, #0xf, lsl #16
  402378:	97fffb92 	bl	4011c0 <usleep@plt>
  40237c:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402380:	91066000 	add	x0, x0, #0x198
  402384:	39400000 	ldrb	w0, [x0]
  402388:	7100001f 	cmp	w0, #0x0
  40238c:	54fff9e1 	b.ne	4022c8 <uart_send_thread+0x90>  // b.any
  402390:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402394:	91054002 	add	x2, x0, #0x150
  402398:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  40239c:	91350001 	add	x1, x0, #0xd40
  4023a0:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4023a4:	91354000 	add	x0, x0, #0xd50
  4023a8:	52802a43 	mov	w3, #0x152                 	// #338
  4023ac:	97fffb99 	bl	401210 <printf@plt>
  4023b0:	97fffb1c 	bl	401020 <getpid@plt>
  4023b4:	2a0003e1 	mov	w1, w0
  4023b8:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  4023bc:	913ea000 	add	x0, x0, #0xfa8
  4023c0:	97fffb94 	bl	401210 <printf@plt>
  4023c4:	52800140 	mov	w0, #0xa                   	// #10
  4023c8:	97fffb96 	bl	401220 <putchar@plt>
  4023cc:	d2800000 	mov	x0, #0x0                   	// #0
  4023d0:	97fffb54 	bl	401120 <pthread_exit@plt>

00000000004023d4 <uart_init>:
  4023d4:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4023d8:	910003fd 	mov	x29, sp
  4023dc:	b9002fa0 	str	w0, [x29, #44]
  4023e0:	b9002ba1 	str	w1, [x29, #40]
  4023e4:	b90027a2 	str	w2, [x29, #36]
  4023e8:	b90023a3 	str	w3, [x29, #32]
  4023ec:	39007fa4 	strb	w4, [x29, #31]
  4023f0:	b9402fa0 	ldr	w0, [x29, #44]
  4023f4:	97fffcc0 	bl	4016f4 <serial_open>
  4023f8:	b9003fa0 	str	w0, [x29, #60]
  4023fc:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402400:	91067000 	add	x0, x0, #0x19c
  402404:	b9403fa1 	ldr	w1, [x29, #60]
  402408:	b9000001 	str	w1, [x0]
  40240c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402410:	9105a002 	add	x2, x0, #0x168
  402414:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402418:	91350001 	add	x1, x0, #0xd40
  40241c:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402420:	91354000 	add	x0, x0, #0xd50
  402424:	52802c63 	mov	w3, #0x163                 	// #355
  402428:	97fffb7a 	bl	401210 <printf@plt>
  40242c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402430:	91032000 	add	x0, x0, #0xc8
  402434:	b9403fa1 	ldr	w1, [x29, #60]
  402438:	97fffb76 	bl	401210 <printf@plt>
  40243c:	52800140 	mov	w0, #0xa                   	// #10
  402440:	97fffb78 	bl	401220 <putchar@plt>
  402444:	b9402ba1 	ldr	w1, [x29, #40]
  402448:	b9403fa0 	ldr	w0, [x29, #60]
  40244c:	97fffd26 	bl	4018e4 <set_speed>
  402450:	39407fa0 	ldrb	w0, [x29, #31]
  402454:	2a0003e3 	mov	w3, w0
  402458:	b94023a2 	ldr	w2, [x29, #32]
  40245c:	b94027a1 	ldr	w1, [x29, #36]
  402460:	b9403fa0 	ldr	w0, [x29, #60]
  402464:	97fffd76 	bl	401a3c <set_parity>
  402468:	3100041f 	cmn	w0, #0x1
  40246c:	54000201 	b.ne	4024ac <uart_init+0xd8>  // b.any
  402470:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402474:	9105a002 	add	x2, x0, #0x168
  402478:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  40247c:	91350001 	add	x1, x0, #0xd40
  402480:	90000000 	adrp	x0, 402000 <uart_receive+0xd4>
  402484:	91354000 	add	x0, x0, #0xd50
  402488:	52802d03 	mov	w3, #0x168                 	// #360
  40248c:	97fffb61 	bl	401210 <printf@plt>
  402490:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402494:	91036000 	add	x0, x0, #0xd8
  402498:	97fffb5e 	bl	401210 <printf@plt>
  40249c:	52800140 	mov	w0, #0xa                   	// #10
  4024a0:	97fffb60 	bl	401220 <putchar@plt>
  4024a4:	52800000 	mov	w0, #0x0                   	// #0
  4024a8:	97fffac2 	bl	400fb0 <exit@plt>
  4024ac:	b9403fa0 	ldr	w0, [x29, #60]
  4024b0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4024b4:	d65f03c0 	ret

00000000004024b8 <uart_exit>:
  4024b8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4024bc:	910003fd 	mov	x29, sp
  4024c0:	b9001fa0 	str	w0, [x29, #28]
  4024c4:	b9401fa0 	ldr	w0, [x29, #28]
  4024c8:	97fffafe 	bl	4010c0 <close@plt>
  4024cc:	d503201f 	nop
  4024d0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4024d4:	d65f03c0 	ret

00000000004024d8 <time_analysis>:
  4024d8:	a9ad7bfd 	stp	x29, x30, [sp, #-304]!
  4024dc:	910003fd 	mov	x29, sp
  4024e0:	f9000fa0 	str	x0, [x29, #24]
  4024e4:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4024e8:	9105e000 	add	x0, x0, #0x178
  4024ec:	f90093a0 	str	x0, [x29, #288]
  4024f0:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4024f4:	910b8002 	add	x2, x0, #0x2e0
  4024f8:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4024fc:	91060001 	add	x1, x0, #0x180
  402500:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402504:	91064000 	add	x0, x0, #0x190
  402508:	528004e3 	mov	w3, #0x27                  	// #39
  40250c:	97fffb41 	bl	401210 <printf@plt>
  402510:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402514:	9106e000 	add	x0, x0, #0x1b8
  402518:	f9400fa1 	ldr	x1, [x29, #24]
  40251c:	97fffb3d 	bl	401210 <printf@plt>
  402520:	52800140 	mov	w0, #0xa                   	// #10
  402524:	97fffb3f 	bl	401220 <putchar@plt>
  402528:	f94093a1 	ldr	x1, [x29, #288]
  40252c:	f9400fa0 	ldr	x0, [x29, #24]
  402530:	97fffa98 	bl	400f90 <strtok@plt>
  402534:	f90097a0 	str	x0, [x29, #296]
  402538:	14000018 	b	402598 <time_analysis+0xc0>
  40253c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402540:	910b8002 	add	x2, x0, #0x2e0
  402544:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402548:	91060001 	add	x1, x0, #0x180
  40254c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402550:	91064000 	add	x0, x0, #0x190
  402554:	52800583 	mov	w3, #0x2c                  	// #44
  402558:	97fffb2e 	bl	401210 <printf@plt>
  40255c:	f94097a0 	ldr	x0, [x29, #296]
  402560:	97fffaf4 	bl	401130 <puts@plt>
  402564:	52800140 	mov	w0, #0xa                   	// #10
  402568:	97fffb2e 	bl	401220 <putchar@plt>
  40256c:	910083a0 	add	x0, x29, #0x20
  402570:	d2802002 	mov	x2, #0x100                 	// #256
  402574:	52800001 	mov	w1, #0x0                   	// #0
  402578:	97fffac2 	bl	401080 <memset@plt>
  40257c:	910083a0 	add	x0, x29, #0x20
  402580:	f94097a1 	ldr	x1, [x29, #296]
  402584:	97fffaff 	bl	401180 <strcpy@plt>
  402588:	f94093a1 	ldr	x1, [x29, #288]
  40258c:	d2800000 	mov	x0, #0x0                   	// #0
  402590:	97fffa80 	bl	400f90 <strtok@plt>
  402594:	f90097a0 	str	x0, [x29, #296]
  402598:	f94097a0 	ldr	x0, [x29, #296]
  40259c:	f100001f 	cmp	x0, #0x0
  4025a0:	54fffce1 	b.ne	40253c <time_analysis+0x64>  // b.any
  4025a4:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4025a8:	910b8002 	add	x2, x0, #0x2e0
  4025ac:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4025b0:	91060001 	add	x1, x0, #0x180
  4025b4:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4025b8:	91064000 	add	x0, x0, #0x190
  4025bc:	52800663 	mov	w3, #0x33                  	// #51
  4025c0:	97fffb14 	bl	401210 <printf@plt>
  4025c4:	910083a1 	add	x1, x29, #0x20
  4025c8:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4025cc:	91072000 	add	x0, x0, #0x1c8
  4025d0:	97fffb10 	bl	401210 <printf@plt>
  4025d4:	52800140 	mov	w0, #0xa                   	// #10
  4025d8:	97fffb12 	bl	401220 <putchar@plt>
  4025dc:	910083a0 	add	x0, x29, #0x20
  4025e0:	94000004 	bl	4025f0 <get_time_value>
  4025e4:	52800000 	mov	w0, #0x0                   	// #0
  4025e8:	a8d37bfd 	ldp	x29, x30, [sp], #304
  4025ec:	d65f03c0 	ret

00000000004025f0 <get_time_value>:
  4025f0:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  4025f4:	910003fd 	mov	x29, sp
  4025f8:	f9000fa0 	str	x0, [x29, #24]
  4025fc:	f9002fbf 	str	xzr, [x29, #88]
  402600:	f9002bbf 	str	xzr, [x29, #80]
  402604:	f90027bf 	str	xzr, [x29, #72]
  402608:	f90023bf 	str	xzr, [x29, #64]
  40260c:	f9001fbf 	str	xzr, [x29, #56]
  402610:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402614:	9108e000 	add	x0, x0, #0x238
  402618:	79400000 	ldrh	w0, [x0]
  40261c:	790053a0 	strh	w0, [x29, #40]
  402620:	f802a3bf 	stur	xzr, [x29, #42]
  402624:	790067bf 	strh	wzr, [x29, #50]
  402628:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  40262c:	91092000 	add	x0, x0, #0x248
  402630:	f9400000 	ldr	x0, [x0]
  402634:	f90013a0 	str	x0, [x29, #32]
  402638:	9100a3a6 	add	x6, x29, #0x28
  40263c:	9100e3a5 	add	x5, x29, #0x38
  402640:	910103a4 	add	x4, x29, #0x40
  402644:	910123a3 	add	x3, x29, #0x48
  402648:	910143a2 	add	x2, x29, #0x50
  40264c:	910163a1 	add	x1, x29, #0x58
  402650:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402654:	91074000 	add	x0, x0, #0x1d0
  402658:	aa0603e7 	mov	x7, x6
  40265c:	aa0503e6 	mov	x6, x5
  402660:	aa0403e5 	mov	x5, x4
  402664:	aa0303e4 	mov	x4, x3
  402668:	aa0203e3 	mov	x3, x2
  40266c:	aa0103e2 	mov	x2, x1
  402670:	aa0003e1 	mov	x1, x0
  402674:	f9400fa0 	ldr	x0, [x29, #24]
  402678:	97fffada 	bl	4011e0 <__isoc99_sscanf@plt>
  40267c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402680:	910bc002 	add	x2, x0, #0x2f0
  402684:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402688:	91060001 	add	x1, x0, #0x180
  40268c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402690:	91064000 	add	x0, x0, #0x190
  402694:	528008c3 	mov	w3, #0x46                  	// #70
  402698:	97fffade 	bl	401210 <printf@plt>
  40269c:	f9402fa1 	ldr	x1, [x29, #88]
  4026a0:	fd402ba0 	ldr	d0, [x29, #80]
  4026a4:	fd4027a1 	ldr	d1, [x29, #72]
  4026a8:	fd4023a2 	ldr	d2, [x29, #64]
  4026ac:	fd401fa3 	ldr	d3, [x29, #56]
  4026b0:	9100a3a2 	add	x2, x29, #0x28
  4026b4:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4026b8:	9107a000 	add	x0, x0, #0x1e8
  4026bc:	97fffad5 	bl	401210 <printf@plt>
  4026c0:	52800140 	mov	w0, #0xa                   	// #10
  4026c4:	97fffad7 	bl	401220 <putchar@plt>
  4026c8:	9100a3a1 	add	x1, x29, #0x28
  4026cc:	910083a0 	add	x0, x29, #0x20
  4026d0:	d28000a2 	mov	x2, #0x5                   	// #5
  4026d4:	97fffacb 	bl	401200 <strncpy@plt>
  4026d8:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4026dc:	91082001 	add	x1, x0, #0x208
  4026e0:	910083a0 	add	x0, x29, #0x20
  4026e4:	97fffa97 	bl	401140 <strcmp@plt>
  4026e8:	7100001f 	cmp	w0, #0x0
  4026ec:	54000101 	b.ne	40270c <get_time_value+0x11c>  // b.any
  4026f0:	f9402fa0 	ldr	x0, [x29, #88]
  4026f4:	fd402ba0 	ldr	d0, [x29, #80]
  4026f8:	fd4027a1 	ldr	d1, [x29, #72]
  4026fc:	fd4023a2 	ldr	d2, [x29, #64]
  402700:	fd401fa3 	ldr	d3, [x29, #56]
  402704:	94000014 	bl	402754 <set_time_prepare>
  402708:	14000010 	b	402748 <get_time_value+0x158>
  40270c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402710:	910bc002 	add	x2, x0, #0x2f0
  402714:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402718:	91060001 	add	x1, x0, #0x180
  40271c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402720:	91064000 	add	x0, x0, #0x190
  402724:	528009e3 	mov	w3, #0x4f                  	// #79
  402728:	97fffaba 	bl	401210 <printf@plt>
  40272c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402730:	910bc001 	add	x1, x0, #0x2f0
  402734:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402738:	91084000 	add	x0, x0, #0x210
  40273c:	97fffab5 	bl	401210 <printf@plt>
  402740:	52800140 	mov	w0, #0xa                   	// #10
  402744:	97fffab7 	bl	401220 <putchar@plt>
  402748:	52800000 	mov	w0, #0x0                   	// #0
  40274c:	a8c67bfd 	ldp	x29, x30, [sp], #96
  402750:	d65f03c0 	ret

0000000000402754 <set_time_prepare>:
  402754:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  402758:	910003fd 	mov	x29, sp
  40275c:	f9001fa0 	str	x0, [x29, #56]
  402760:	fd001ba0 	str	d0, [x29, #48]
  402764:	fd0017a1 	str	d1, [x29, #40]
  402768:	fd0013a2 	str	d2, [x29, #32]
  40276c:	fd000fa3 	str	d3, [x29, #24]
  402770:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402774:	910c0002 	add	x2, x0, #0x300
  402778:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  40277c:	91060001 	add	x1, x0, #0x180
  402780:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402784:	91064000 	add	x0, x0, #0x190
  402788:	52800b63 	mov	w3, #0x5b                  	// #91
  40278c:	97fffaa1 	bl	401210 <printf@plt>
  402790:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402794:	91094000 	add	x0, x0, #0x250
  402798:	fd400fa3 	ldr	d3, [x29, #24]
  40279c:	fd4013a2 	ldr	d2, [x29, #32]
  4027a0:	fd4017a1 	ldr	d1, [x29, #40]
  4027a4:	fd401ba0 	ldr	d0, [x29, #48]
  4027a8:	f9401fa1 	ldr	x1, [x29, #56]
  4027ac:	97fffa99 	bl	401210 <printf@plt>
  4027b0:	52800140 	mov	w0, #0xa                   	// #10
  4027b4:	97fffa9b 	bl	401220 <putchar@plt>
  4027b8:	f9401fa1 	ldr	x1, [x29, #56]
  4027bc:	d2875000 	mov	x0, #0x3a80                	// #14976
  4027c0:	f2a00120 	movk	x0, #0x9, lsl #16
  4027c4:	9b007c21 	mul	x1, x1, x0
  4027c8:	d294bfe0 	mov	x0, #0xa5ff                	// #42495
  4027cc:	f2a259c0 	movk	x0, #0x12ce, lsl #16
  4027d0:	8b000021 	add	x1, x1, x0
  4027d4:	fd401ba0 	ldr	d0, [x29, #48]
  4027d8:	9e780000 	fcvtzs	x0, d0
  4027dc:	8b000020 	add	x0, x1, x0
  4027e0:	f9002fa0 	str	x0, [x29, #88]
  4027e4:	f9402fa1 	ldr	x1, [x29, #88]
  4027e8:	d292f000 	mov	x0, #0x9780                	// #38784
  4027ec:	f2a000c0 	movk	x0, #0x6, lsl #16
  4027f0:	8b000020 	add	x0, x1, x0
  4027f4:	f9002fa0 	str	x0, [x29, #88]
  4027f8:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4027fc:	910c0002 	add	x2, x0, #0x300
  402800:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402804:	91060001 	add	x1, x0, #0x180
  402808:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  40280c:	91064000 	add	x0, x0, #0x190
  402810:	52800c43 	mov	w3, #0x62                  	// #98
  402814:	97fffa7f 	bl	401210 <printf@plt>
  402818:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  40281c:	9109c000 	add	x0, x0, #0x270
  402820:	f9402fa1 	ldr	x1, [x29, #88]
  402824:	97fffa7b 	bl	401210 <printf@plt>
  402828:	52800140 	mov	w0, #0xa                   	// #10
  40282c:	97fffa7d 	bl	401220 <putchar@plt>
  402830:	910103a0 	add	x0, x29, #0x40
  402834:	fd401ba0 	ldr	d0, [x29, #48]
  402838:	97fffa46 	bl	401150 <modf@plt>
  40283c:	fd002ba0 	str	d0, [x29, #80]
  402840:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402844:	910c0002 	add	x2, x0, #0x300
  402848:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  40284c:	91060001 	add	x1, x0, #0x180
  402850:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402854:	91064000 	add	x0, x0, #0x190
  402858:	52800ca3 	mov	w3, #0x65                  	// #101
  40285c:	97fffa6d 	bl	401210 <printf@plt>
  402860:	fd4023a0 	ldr	d0, [x29, #64]
  402864:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402868:	9109e000 	add	x0, x0, #0x278
  40286c:	fd402ba1 	ldr	d1, [x29, #80]
  402870:	97fffa68 	bl	401210 <printf@plt>
  402874:	52800140 	mov	w0, #0xa                   	// #10
  402878:	97fffa6a 	bl	401220 <putchar@plt>
  40287c:	fd402ba0 	ldr	d0, [x29, #80]
  402880:	d2d09000 	mov	x0, #0x848000000000        	// #145685290680320
  402884:	f2e825c0 	movk	x0, #0x412e, lsl #48
  402888:	9e670001 	fmov	d1, x0
  40288c:	1e610800 	fmul	d0, d0, d1
  402890:	9e780000 	fcvtzs	x0, d0
  402894:	f90027a0 	str	x0, [x29, #72]
  402898:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  40289c:	910c0002 	add	x2, x0, #0x300
  4028a0:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4028a4:	91060001 	add	x1, x0, #0x180
  4028a8:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4028ac:	91064000 	add	x0, x0, #0x190
  4028b0:	52800d03 	mov	w3, #0x68                  	// #104
  4028b4:	97fffa57 	bl	401210 <printf@plt>
  4028b8:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4028bc:	910a2000 	add	x0, x0, #0x288
  4028c0:	f94027a1 	ldr	x1, [x29, #72]
  4028c4:	97fffa53 	bl	401210 <printf@plt>
  4028c8:	52800140 	mov	w0, #0xa                   	// #10
  4028cc:	97fffa55 	bl	401220 <putchar@plt>
  4028d0:	f94027a1 	ldr	x1, [x29, #72]
  4028d4:	f9402fa0 	ldr	x0, [x29, #88]
  4028d8:	97fffaf5 	bl	4014ac <display_gps_microsecond>
  4028dc:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  4028e0:	9105c000 	add	x0, x0, #0x170
  4028e4:	b9400000 	ldr	w0, [x0]
  4028e8:	7100001f 	cmp	w0, #0x0
  4028ec:	54000080 	b.eq	4028fc <set_time_prepare+0x1a8>  // b.none
  4028f0:	f94027a1 	ldr	x1, [x29, #72]
  4028f4:	f9402fa0 	ldr	x0, [x29, #88]
  4028f8:	94000004 	bl	402908 <set_system_time>
  4028fc:	52800000 	mov	w0, #0x0                   	// #0
  402900:	a8c67bfd 	ldp	x29, x30, [sp], #96
  402904:	d65f03c0 	ret

0000000000402908 <set_system_time>:
  402908:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40290c:	910003fd 	mov	x29, sp
  402910:	f9000fa0 	str	x0, [x29, #24]
  402914:	f9000ba1 	str	x1, [x29, #16]
  402918:	f9400fa0 	ldr	x0, [x29, #24]
  40291c:	f90017a0 	str	x0, [x29, #40]
  402920:	f9400ba0 	ldr	x0, [x29, #16]
  402924:	f9001ba0 	str	x0, [x29, #48]
  402928:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  40292c:	910a4000 	add	x0, x0, #0x290
  402930:	97fff9dc 	bl	4010a0 <putenv@plt>
  402934:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402938:	910a8000 	add	x0, x0, #0x2a0
  40293c:	97fff9d9 	bl	4010a0 <putenv@plt>
  402940:	97fff9c4 	bl	401050 <tzset@plt>
  402944:	9100a3a0 	add	x0, x29, #0x28
  402948:	d2800001 	mov	x1, #0x0                   	// #0
  40294c:	97fffa21 	bl	4011d0 <settimeofday@plt>
  402950:	b9003fa0 	str	w0, [x29, #60]
  402954:	b9403fa0 	ldr	w0, [x29, #60]
  402958:	7100001f 	cmp	w0, #0x0
  40295c:	54000200 	b.eq	40299c <set_system_time+0x94>  // b.none
  402960:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402964:	910c6002 	add	x2, x0, #0x318
  402968:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  40296c:	91060001 	add	x1, x0, #0x180
  402970:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402974:	91064000 	add	x0, x0, #0x190
  402978:	52801183 	mov	w3, #0x8c                  	// #140
  40297c:	97fffa25 	bl	401210 <printf@plt>
  402980:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402984:	910ac000 	add	x0, x0, #0x2b0
  402988:	97fff9ea 	bl	401130 <puts@plt>
  40298c:	52800140 	mov	w0, #0xa                   	// #10
  402990:	97fffa24 	bl	401220 <putchar@plt>
  402994:	12800000 	mov	w0, #0xffffffff            	// #-1
  402998:	14000012 	b	4029e0 <set_system_time+0xd8>
  40299c:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  4029a0:	9105c000 	add	x0, x0, #0x170
  4029a4:	b900001f 	str	wzr, [x0]
  4029a8:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4029ac:	910c6002 	add	x2, x0, #0x318
  4029b0:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4029b4:	91060001 	add	x1, x0, #0x180
  4029b8:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4029bc:	91064000 	add	x0, x0, #0x190
  4029c0:	52801243 	mov	w3, #0x92                  	// #146
  4029c4:	97fffa13 	bl	401210 <printf@plt>
  4029c8:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4029cc:	910b2000 	add	x0, x0, #0x2c8
  4029d0:	97fff9d8 	bl	401130 <puts@plt>
  4029d4:	52800140 	mov	w0, #0xa                   	// #10
  4029d8:	97fffa12 	bl	401220 <putchar@plt>
  4029dc:	52800000 	mov	w0, #0x0                   	// #0
  4029e0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4029e4:	d65f03c0 	ret

00000000004029e8 <trigger_open>:
  4029e8:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4029ec:	910003fd 	mov	x29, sp
  4029f0:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  4029f4:	910ca000 	add	x0, x0, #0x328
  4029f8:	52800001 	mov	w1, #0x0                   	// #0
  4029fc:	97fff991 	bl	401040 <open@plt>
  402a00:	2a0003e1 	mov	w1, w0
  402a04:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402a08:	91068000 	add	x0, x0, #0x1a0
  402a0c:	b9000001 	str	w1, [x0]
  402a10:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402a14:	91068000 	add	x0, x0, #0x1a0
  402a18:	b9400000 	ldr	w0, [x0]
  402a1c:	7100001f 	cmp	w0, #0x0
  402a20:	5400020c 	b.gt	402a60 <trigger_open+0x78>
  402a24:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402a28:	910e4002 	add	x2, x0, #0x390
  402a2c:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402a30:	910ce001 	add	x1, x0, #0x338
  402a34:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402a38:	910d2000 	add	x0, x0, #0x348
  402a3c:	528003c3 	mov	w3, #0x1e                  	// #30
  402a40:	97fff9f4 	bl	401210 <printf@plt>
  402a44:	b0000000 	adrp	x0, 403000 <__FUNCTION__.5469+0x320>
  402a48:	910dc000 	add	x0, x0, #0x370
  402a4c:	97fff9b9 	bl	401130 <puts@plt>
  402a50:	52800140 	mov	w0, #0xa                   	// #10
  402a54:	97fff9f3 	bl	401220 <putchar@plt>
  402a58:	52800000 	mov	w0, #0x0                   	// #0
  402a5c:	97fff955 	bl	400fb0 <exit@plt>
  402a60:	52800000 	mov	w0, #0x0                   	// #0
  402a64:	a8c17bfd 	ldp	x29, x30, [sp], #16
  402a68:	d65f03c0 	ret

0000000000402a6c <trigger_jump>:
  402a6c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  402a70:	910003fd 	mov	x29, sp
  402a74:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402a78:	91068000 	add	x0, x0, #0x1a0
  402a7c:	b9400000 	ldr	w0, [x0]
  402a80:	d28e8021 	mov	x1, #0x7401                	// #29697
  402a84:	97fff9eb 	bl	401230 <ioctl@plt>
  402a88:	52884800 	mov	w0, #0x4240                	// #16960
  402a8c:	72a001e0 	movk	w0, #0xf, lsl #16
  402a90:	97fff9cc 	bl	4011c0 <usleep@plt>
  402a94:	d0000080 	adrp	x0, 414000 <tcflush@GLIBC_2.17>
  402a98:	91068000 	add	x0, x0, #0x1a0
  402a9c:	b9400000 	ldr	w0, [x0]
  402aa0:	d28e8061 	mov	x1, #0x7403                	// #29699
  402aa4:	97fff9e3 	bl	401230 <ioctl@plt>
  402aa8:	52800000 	mov	w0, #0x0                   	// #0
  402aac:	a8c17bfd 	ldp	x29, x30, [sp], #16
  402ab0:	d65f03c0 	ret
  402ab4:	00000000 	.inst	0x00000000 ; undefined

0000000000402ab8 <__libc_csu_init>:
  402ab8:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  402abc:	910003fd 	mov	x29, sp
  402ac0:	a901d7f4 	stp	x20, x21, [sp, #24]
  402ac4:	b0000094 	adrp	x20, 413000 <__FRAME_END__+0xfc60>
  402ac8:	b0000095 	adrp	x21, 413000 <__FRAME_END__+0xfc60>
  402acc:	91374294 	add	x20, x20, #0xdd0
  402ad0:	913722b5 	add	x21, x21, #0xdc8
  402ad4:	a902dff6 	stp	x22, x23, [sp, #40]
  402ad8:	cb150294 	sub	x20, x20, x21
  402adc:	f9001ff8 	str	x24, [sp, #56]
  402ae0:	2a0003f6 	mov	w22, w0
  402ae4:	aa0103f7 	mov	x23, x1
  402ae8:	9343fe94 	asr	x20, x20, #3
  402aec:	aa0203f8 	mov	x24, x2
  402af0:	97fff914 	bl	400f40 <_init>
  402af4:	b4000194 	cbz	x20, 402b24 <__libc_csu_init+0x6c>
  402af8:	f9000bb3 	str	x19, [x29, #16]
  402afc:	d2800013 	mov	x19, #0x0                   	// #0
  402b00:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  402b04:	aa1803e2 	mov	x2, x24
  402b08:	aa1703e1 	mov	x1, x23
  402b0c:	2a1603e0 	mov	w0, w22
  402b10:	91000673 	add	x19, x19, #0x1
  402b14:	d63f0060 	blr	x3
  402b18:	eb13029f 	cmp	x20, x19
  402b1c:	54ffff21 	b.ne	402b00 <__libc_csu_init+0x48>  // b.any
  402b20:	f9400bb3 	ldr	x19, [x29, #16]
  402b24:	a941d7f4 	ldp	x20, x21, [sp, #24]
  402b28:	a942dff6 	ldp	x22, x23, [sp, #40]
  402b2c:	f9401ff8 	ldr	x24, [sp, #56]
  402b30:	a8c47bfd 	ldp	x29, x30, [sp], #64
  402b34:	d65f03c0 	ret

0000000000402b38 <__libc_csu_fini>:
  402b38:	d65f03c0 	ret

Disassembly of section .fini:

0000000000402b3c <_fini>:
  402b3c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  402b40:	910003fd 	mov	x29, sp
  402b44:	a8c17bfd 	ldp	x29, x30, [sp], #16
  402b48:	d65f03c0 	ret
